EM638325TS-6 Etron Technology Inc., EM638325TS-6 Datasheet

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EM638325TS-6

Manufacturer Part Number
EM638325TS-6
Description
Manufacturer
Etron Technology Inc.
Datasheet

Specifications of EM638325TS-6

Case
SSOP-86
Date_code
04+

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Features
Overview
synchronous DRAM containing 32 Mbits. It is internally
configured as a quad 512K x 32 DRAM with a
synchronous interface (all signals are registered on the
positive edge of the clock signal, CLK). Each of the 512K
x 32 bit banks is organized as 4096 rows by 256
columns by 32 bits. Read and write accesses to the
SDRAM are burst oriented; accesses start at a selected
location and continue for a programmed number of
locations in a programmed sequence. Accesses begin
with the registration of a BankActivate command which
is then followed by a Read or Write command.
or Write burst lengths of 1, 2, 4, 8, or full page, with a
burst termination option. An auto precharge function may
be enabled to provide a self-timed row precharge that is
initiated at the end of the burst sequence. The refresh
functions, either Auto or Self Refresh are easy to use.
system can choose the most suitable modes to
maximize its performance. These devices are well suited
for applications requiring high memory bandwidth.
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C
TEL: (886)-3-5782345
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
Fast clock rate: 200/166/143/125/100 MHz
Fully synchronous operation
Internal pipelined architecture
Four internal banks (512K x 32bit x 4bank)
Programmable Mode
- CAS# Latency: 2 or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst-Read-Single-Write
Burst stop function
Individual byte controlled by DQM0-3
Auto Refresh and Self Refresh
4096 refresh cycles/64ms
Single +3.3V ± 0.3V power supply
Interface: LVTTL
Package: 400 x 875 mil, 86 Pin TSOP II, 0.50mm
pin pitch
The EM638325 SDRAM is a high-speed CMOS
The EM638325 provides for programmable Read
By having a programmable mode register, the
FAX: (886)-3-5778671
2M x 32 Synchronous DRAM (SDRAM)
Ordering Information
EM638325TS-5
EM638325TS-6
EM638325TS-7
EM638325TS-8
EM638325TS-10
Part Number
Pin Assignment (Top View)
A10/AP
DQM 2
VDDQ
VSSQ
VDDQ
VSSQ
VSSQ
VDDQ
VSSQ
VDDQ
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
/CAS
/RAS
DM 0
VDD
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VDD
VDD
VDD
BS0
BS1
/W E
/CS
NC
NC
NC
A0
A1
A2
Preliminary (REV. 0.3 11/99)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Frequency
200MHz
166MHz
143MHz
125MHz
100MHz
EM638325
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Package
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ 9
VDDQ
DQ 8
NC
VSS
DQM 1
VREF
NC
CL K
CKE
A9
A8
A7
A6
A5
A4
A3
DQM 3
VSS
NC
DQ31
VDDQ
DQ30
DQ29
VSSQ
DQ28
DQ27
VDDQ
DQ26
DQ25
VSSQ
DQ24
VSS
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II

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