CH7011A-T Chrontel, CH7011A-T Datasheet

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CH7011A-T

Manufacturer Part Number
CH7011A-T
Description
Manufacturer
Chrontel
Datasheet

Specifications of CH7011A-T

Case
TQFP/64
Date_code
03+

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CHRONTEL
CHRONTEL
CHRONTEL
CHRONTEL
CHRONTEL
Chrontel
1. F
• TV output supporting graphics resolutions up to
• Macrovision
• Programmable digital interface supports RGB and
• True scale rendering engine supports underscan in all
• Enhanced text sharpness and adaptive flicker
• Support for all NTSC and PAL formats
• Provides CVBS, S-Video and SCART (RGB) outputs
• TV Programmable power management
• 10-bit video DAC outputs
• Fully programmable through serial port
• Complete Windows and DOS driver support
• Low voltage interface support to graphics device
• Offered in a 64-pin LQFP package
201-0000-037 Rev 2.05, 6/6/2002
1024x768 pixels
YCrCb
TV output resolutions
removal with up to 7 lines of filtering
PIXEL DATA
EATURES
GPIO[1:0]
D[11:0]
INTERFACE
DIGITAL
SERIAL PORT REGISTER &
7.1.L1 copy protection support
SPC
INPUT
Chrontel CH7011 TV Output Device
CONTROL BLOCK
SPD
CONVERTER
RGB-YUV
RESET*
Figure 1: Functional Block Diagram
DEFLICKERING
SYSTEM CLOCK
XCLK/XCLK*
TRUE SCALE
SCALING &
MEMORY
ENGINE
PLL
LINE
2. G
The CH7011 is a display controller device which
accepts a digital graphics input signal, and encodes and
transmits data to a TV output (analog composite, s-
video or RGB). The device accepts data over one 12-bit
wide variable voltage data port which supports five
different data formats including RGB and YCrCb.
The TV-Out processor will perform non-interlace to
interlace conversion with scaling and flicker filters, and
encode the data into any of the NTSC or PAL video
standards. The scaling and flicker filter is adaptive and
programmable to enable superior text display. Eight
graphics resolutions are supported up to 1024 by 768
with full vertical and horizontal underscan capability in
all modes. A high accuracy low jitter phase locked loop
is integrated to create outstanding video quality.
Support is provided for Macrovision
mode which enables driving a VGA CRT with the input
data.
YUV-RGB CONVERTER
H
ENERAL
TIMING & SYNC
GENERATOR
ENCODER
& FILTERS
NTSC/PAL
V
XI/FIN
D
XO
ESCRIPTION
CSYNC
P-OUT
10-bit
DAC’s
Four
BCO
CH7011A
and RGB bypass
CVBS (DAC3)
Y/G (DAC1)
C/R (DAC2)
CVBS/B
ISET
(DAC0)
1

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