LH530800A SHARP [Sharp Electrionic Components], LH530800A Datasheet
LH530800A
Related parts for LH530800A
LH530800A Summary of contents
Page 1
... Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 450-mil QFJ (PLCC) JEDEC standard EPROM pinout (DIP) DESCRIPTION The LH530800A is a mask-programmable ROM organized as 131,072 8 bits (1,048,576 bits fab- ricated using silicon-gate CMOS process technology. CMOS 1M (128K PIN CONNECTIONS 32-PIN DIP ...
Page 2
... L H/L Selected NOTE COLUMN SELECTOR SENSE AMPLIFIER TIMING GENERATOR OUTPUT BUFFER GND Figure 3. LH530800A Block Diagram NOTE SIGNAL V CC GND SUPPLY CURRENT 0 7 High-Z Standby ( High-Z Operating ( Operating (I ) OUT ...
Page 3
... 150 0 MHz 10 + MIN. TYP. MAX. 150 150 150 LH530800A TYP. MAX. UNIT NOTE 100 ...
Page 4
... LH530800A AC TEST CONDITIONS PARAMETER RATING Input voltage amplitude 0 2.4 V Input rise/fall time Input reference level Output reference level 0.8 V and 2.2 V Output load condition 1TTL +100 NOTE: Data becomes valid after ACE input, chip enable and output enable, respectively have been met. ...
Page 5
... MIN. 32-pin, 600-mil DIP 1.27 [0.050] TYP. 1.40 [0.055] 17 11.50 [0.453] 14.50 [0.571] 11.10 [0.437] 13.70 [0.539] 16 1.40 [0.055] 0.15 [0.006] 1.275 [0.050] 2.90 [0.114] 2.50 [0.098] 0.20 [0.008] 0.00 [0.000] 1.275 [0.050] 32-pin, 525-mil SOP LH530800A DETAIL 0.30 [0.012] 0.20 [0.008] 15.24 [0.600] TYP. 32DIP 12.50 [0.492] 0.20 [0.008] 0.10 [0.004] 32SOP 5 ...
Page 6
... TYP. 13.50 [0.531] 12.70 [0.500] MAXIMUM LIMIT DIMENSIONS IN MM (INCHES) MINIMUM LIMIT ORDERING INFORMATION LH530800A Device Type Example: LH530800AD (CMOS 1M (128K x 8) Mask Programmable ROM, 32-pin, 600-mil DIP 11.40 [0.449 0.25 [0.010] 1.20 [0.047] 1.20 [0.047] 2.30 [0.091] 0.56 [0.022] 0.36 [0.014] 32-pin, 450-mil QFJ (PLCC) ...