LH5316P00B SHARP [Sharp Electrionic Components], LH5316P00B Datasheet

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LH5316P00B

Manufacturer Part Number
LH5316P00B
Description
CMOS 16M (2M x 8/1M x 16) MROM
Manufacturer
SHARP [Sharp Electrionic Components]
Datasheet
LH5316P00B
FEATURES
DESCRIPTION
ROM organized as 2,097,152
1,048,576
by a BYTE input pin. It is fabricated using silicon-gate
CMOS process technology.
The LH5316P00B is a 16M-bit mask-programmable
2,097,152
1,048,576
Access time: 120 ns (MAX.)
Supply current:
TTL compatible I/O
Three-state output
Single +5 V power supply
Static operation
Package:
Item related with COCOM regulation:
(Byte mode: BYTE = V
(Word mode: BYTE = V
– Operating: 70 mA (MAX.)
– Standby: 100 A (MAX.)
44-pin, 600-mil SOP
– Non programmable
– Not designed or rated as radiation
– CMOS process (P type silicon
hardened
substrate)
16 bits (Word mode) that can be selected
8 bit organization
16 bit organization
8 bits (Byte mode) or
IL
IH
)
)
PIN CONNECTIONS
44-PIN SOP
NOTE: The D
CMOS 16M (2M
data output (D
The input state of BYTE pin can not be changed during
operation. The BYTE pin must be set to either GND or V
when the BYTE pin is set to be LOW in byte mode and
GND
15
Figure 1. Pin Connections
A
A
D
OE
D
NC
CE
/A
D
D
D
D
A
A
A
A
A
A
A
D
A
D
18
17
10
11
7
6
5
4
3
2
0
8
2
3
-1
0
9
1
1
pin becomes LSB address input (A
15
1
10
14
16
17
19
2
3
4
5
6
7
8
9
12
13
15
18
20
22
11
21
) when set to be HIGH in word mode.
8/1M
42
40
39
36
26
44
43
38
37
35
34
33
32
30
29
28
27
25
24
23
31
41
A
NC
A
A
A
A
A
A
A
A
A
BYTE
GND
D
D
D
D
D
D
D
D
V
11
13
14
CC
19
8
9
10
12
15
16
15
7
14
6
13
5
12
4
/A
16) MROM
-1
(NOTE)
TOP VIEW
-1
5316P00B-1
)
CC
.
1

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LH5316P00B Summary of contents

Page 1

... Non programmable – Not designed or rated as radiation hardened – CMOS process (P type silicon substrate) DESCRIPTION The LH5316P00B is a 16M-bit mask-programmable ROM organized as 2,097,152 8 bits (Byte mode) or 1,048,576 16 bits (Word mode) that can be selected by a BYTE input pin fabricated using silicon-gate CMOS process technology ...

Page 2

... CE Chip enable input 2 MEMORY MATRIX (2,097,152 x 8) (1,048,576 x 16) COLUMN SELECTOR TIMING SENSE AMPLIFIER GENERATOR ADDRESS BUFFER Figure 2. LH5316P00B Block Diagram SIGNAL GND NC CMOS 16M (2M x 8/1M x 16) MROM ...

Page 3

... OUT 120 0 MHz LH5316P00B SUPPLY CURRENT Standby ( Operating Operating Operating Operating = MAX. UNIT NOTE ...

Page 4

... LH5316P00B AC ELECTICAL CHARACTERISTICS (V PARAMETER SYMBOL Read cycle time t RC Address access time t AA Chip enable access time t ACE Output enable delay time t OE Output hold time CHZ Output floating time t OHZ NOTE: 1. Determined by the time for the output to be opened. (Irrespective of output voltage) ...

Page 5

... AA ACE (NOTE) t ACE (NOTE (NOTE) DATA VALID Figure 3. Byte Mode (BYTE = (NOTE) t ACE (NOTE (NOTE) DATA VALID Figure 4. Word Mode (BYTE = V IH LH5316P00B t CHZ t OHZ t OH 5316P00B CHZ t OHZ t OH 5316P00B ...

Page 6

... TYP. 0.50 [0.020] 0.30 [0.012 28.40 [1.118] 28.00 [1.102] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5316P00B N Device Type Package Example: LH5316P00N (CMOS 16M ( 16) Mask-Programmable ROM, 44-pin, 600-mil SOP 13.40 [0.528] 16.40 [0.646] 13.00 [0.512] 15.60 [0.614] SEE 22 DETAIL 0 ...

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