H5PS1G63EFR HYNIX [Hynix Semiconductor], H5PS1G63EFR Datasheet - Page 39

• Manufacturer Part Number: H5PS1G63EFR
• Description: 1Gb DDR2 SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.4 / Nov 2008
are satisfied.
For example, the device will support tnRP = RU {tRP / tCK (avg)}, which is in clock cycles, if all input clock
jitter specifications are met. This means: For DDR2-667 5-5-5, of which tRP = 15ns, the device will support
tnRP =RU {tRP / tCK (avg)} = 5, i.e. as long as the input clock jitter specifications are met, Precharge
command at Tm and Active command at Tm+5 is valid even if (Tm+5 - Tm) is less than 15ns due to input
clock jitter.
33. tDAL [nCK] = WR [nCK] + tnRP [nCK] = WR + RU {tRP [ps] / tCK (avg) [ps]}, where WR is the value
programmed in the mode register set.
34. New units, ‘tCK (avg)’ and ‘nCK’, are introduced in DDR2-667 and DDR2-800.
Unit ‘tCK (avg)’ represents the actual tCK (avg) of the input clock under operation.
Unit ‘nCK’, represents one clock cycle of the input clock, counting the actual clock edges.
Note that in DDR2-400 and DDR2-533, ‘tCK’, is used for both concepts.
ex) tXP = 2 [nCK] means; if Power Down exit is registered at Tm, an Active command may be registered
at Tm+2, even if (Tm+2 - Tm) is 2 x tCK (avg) + tERR(2per),min.
35. Input clock jitter spec parameter. These parameters and the ones in the table below are referred to as
'input clock jitter spec parameters' and these parameters apply to DDR2-667 and DDR2-800 only. The jitter
specified is a random jitter meeting a Gaussian distribution.
Clock period jitter during DLL locking period
Cycle to cycle clock period jitter during DLL
Cumulative error across n cycles,
Cumulative error across n cycles,
Cumulative error across 2 cycles
Cumulative error across 3 cycles
Cumulative error across 4 cycles
Cumulative error across 5 cycles
Cycle to cycle clock period jitter
n=11...50, inclusive
n=6...10, inclusive
Clock period jitter
Duty cycle jitter
locking period
Parameter
tJIT (per)
tJIT (per, lck)
tJIT (cc)
tJIT (cc, lck)
tERR(2per)
tERR(3per)
tERR(4per)
tERR(5per)
tERR(6~10per)
tERR(11~50per)
tJIT (duty)
Symbol
-125
-100
-250
-200
-175
-225
-250
-250
-350
-450
-125
min
DDR2-667
max
125
100
250
200
175
225
250
250
350
450
125
-100
-200
-160
-150
-175
-200
-200
-300
-450
-100
min
-80
DDR2-800
max
100
200
160
150
175
200
200
300
450
100
80
H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Notes
35
35
35
35
35
35
35
35
35
35
35
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