CXA1372BQ SONY [Sony Corporation], CXA1372BQ Datasheet
CXA1372BQ
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CXA1372BQ Summary of contents
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... RF Signal Processing Servo Amplifier for CD Player Description The CXA1372BQ/ bipolar IC developed for RF signal processing (focus OK, mirror, defect detection, EFM comparator) and various servo control. Features • Dual ±5V and single 5V power supplies • Low power consumption • Fewer external parts • ...
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... TG1 to 2 • TM1 to 7 • PS1 to 3 TG1 TM1 • FOCUS PHASE COMPENSATION FS1 FS2 – 2 – CXA1372BQ/ • IIL • TTL • TTL • IIL • TRACKING PHASE COMPENSATION • I SET • F SET TM6 ...
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... CXA1372BQ CXA1372BS – 3 – CXA1372BQ/ DATA 24 23 XLT CLK 22 21 LOCK DIRC SSTOP 17 ISET 16 FSET SL– SLO 13 SL ...
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... CXA1372BQ/BS Description Center voltage input. For dual power supplies: GND For single power supply GND)/2 CC Connects a capacitor between this pin and Pin 3 to cut high-frequency gain. The high-frequency gain of the focus servo is switched through FS3 ON and OFF ...
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... CXA1372BQ/BS Description External time constant for forming the focus search waveforms. External time constant for selecting the tracking high-frequency gain. External time constant for selecting the tracking high-frequency gain. Inverted input for tracking amplifier. ...
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... CXA1372BQ/BS Description Sets the peak frequency of focus tracking phase compensation. Current is input to determine focus search, track jump, and sled kick level. Limit SW ON/OFF signal detection for disc innermost track detection. Used for 1-track jump. Contains a 47kΩ ...
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... GND 20k 147 33 – 7 – CXA1372BQ/BS Description MIRR comparator output. (DC voltage: 10kΩ load connected) Connects MIRR hold capacitor. Non-inverted input for MIRR comparator. DEFECT bottom hold output. 35 Input for DEFECT bottom hold output with capacitance coupled. ...
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... V EE 60k 147 1.2k 147 470k 47 147 48 – 8 – CXA1372BQ/BS Description Input for RF summing amplifier output with capacitance coupled. RF summing amplifier output. Check point of eye pattern. Tracking zero-cross comparator input. Tracking error input. Connects a capacitor for time constant during defect. Window comparator input for ATSC detection ...
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... SERVO FOCUS – 9 – CXA1372BQ/BS SERVO TRACKING ...
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... SERVO SERVO TRACKING SLED – 10 – CXA1372BQ/BS FOK ...
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... MIRROR DEFECT – 11 – CXA1372BQ/BS EFM ...
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... 200k GND GND – 12 – DATA 24 XLT 23 CLK 22 LOCK 21 DIRC SSTOP 18 ISET 17 240k 16 FSET 510k 5.1k 15 SL– 130 SLO 14 S7 13k 13 SL GND 100k A S5 200k AVcc GND CXA1372BQ/BS DATA XLT CLK ...
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... FZC DFCT 20k 48k Focus Phase Compensation FS4 FS2 40k FS3 FLB FSET 4 16 510k 0.1µ 0.01µ and VC (Pin 1 – 13 – CXA1372BQ/BS FEO FOCUS COIL 5 100k FE– 40k 6 120k 11µ 22µ 10k ISET 120k 17 50k FS1 DGND SRCH 7 4.7µ ...
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... TM1 10k 90k Tracking Phase Compensation TM7 FSET 16 510k 0.01µ feedback resistance feedback resistance – 14 – 100k 18 SSTOP 100k 1k SLED MOTOR SLO 14 0.015µ 120k SL– 15 3.3µ 10k SL+ 13 22µ TM2 15k 82k TA– 12 100k TRACKING COIL TAO 11 CXA1372BQ/BS M 8.2k ...
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... FOCUS OK AMP – V –0.37V. RFI RFO VC 100k 20k 31 6 AUTO ASYMMETRY 40k 40k BUFFER 32 + DGND)/2V. When fc (cut-off frequency) exceeds 500Hz, the CC – 15 – 20k 54k 92k 0.625V FOCUS OK COMPARATOR ASY CMOS BUFFER DGND = 0V CXD2500 EFM CXA1372BQ/BS 33 FOK ...
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... The long and short time-constant signals are compared to generate at mirror defect detection signal RFO 40 2 DEFECT AMP RFO a b DEFECT AMP BOTTOM c HOLD (1); Solid line CC1 e DEFECT 0.033µ CC1 34 DEFECT COMPARATOR DEFECT BOTTOM HOLD 37 CB 0.01µ – 16 – CXA1372BQ/BS CC2 DFCT d d BOTTOM HOLD (2); Dotted line CC2 H L ...
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... MIRR areas). In addition, a high signal is output when a defect is detected. The mirror hold time constant must be sufficiently large in comparison with the traverse signal. MIRROR HOLD AMP H PEAK & BOTTOM 1 J HOLD I MIRROR COMPARATOR – 17 – CXA1372BQ/BS 0.033µ 20k MIRR DGND ...
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... By alternating the commands between $02 and $03, the focus search voltage can be constructed. (Fig Fig. 2. Constructing the search voltage by alternating between $02 and $03 (Voltage at Pin FS4 FS3 50kΩ = 0.55V. resistance between Pins 5 and 6 50kΩ – 18 – CXA1372BQ/ FS2 FS1 Equation ...
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... Drive voltage Focus error SENS pin (FZC) Focus Fig. 3. S-curve (20ms) (200ms) $02 $03 $08 The instant the signal is brought into focus. Fig. 4. Focus ON timing chart – 19 – CXA1372BQ/BS The broken lines in the figure indicate the voltage assuming the signal is not in focus. ...
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... RF envelope and the tracking error is 180˚out-of-phase to cut the unneeded portion of the tracking error and apply braking. Transfer $ ANTI Break TG2 TG1 SHOCK circuit ON/OFF ON/OFF – 20 – CXA1372BQ/ YES FZC ? NO YES Latch (B) ...
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... Fig. 6. TM7 operation (brake circuit) From outer to inner track Fig. 7. Internal waveform Tracking control 00: OFF 01: Servo ON 10: F-JUMP 11: R-JUMP TM1, TM3, TM4 – 21 – CXA1372BQ/ TM7 D Q Low: open BRK High: make CK ("MIRR") ("TZC") Braking is applied from here. ...
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... As a result, the track jump turns out as shown in the flow chart of Fig. 10 and the two serial data transfers can be omitted. Deceleration Acceleration $2C transfer latch Execute TZC DIRC = L Timer (0.3ms) DIRC = H Execute Fig. 10. 1-track jump with DIRC (Pin 20) – 22 – CXA1372BQ/BS TR: REV Execute SL: OFF ? NO YES TR: FWD SL: OFF TR: ON SL: ON ...
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... D0, D1 ..... Sled, NORMAL feed, high-speed feed D2, D3 ..... Focus search level selection Focus search level (PS4 Sled kick level (PS3) (PS2) (PS1 – 23 – CXA1372BQ/BS Relative value ±1 ±2 ±3 ±4 ...
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... Parallel Direct Interface 1. DIRC $28 latch XLT DIRC ON FWD JUMP OFF REV JUMP OFF TRACK SERVO ON OFF ON SLED SERVO OFF 2. LOCK (Sled overrun prevention circuit) LOCK ON SLED SERVO TG1, TG2 ON TRACKING GAIN DOWN ON OFF OFF UP – 24 – CXA1372BQ/BS $2C latch ...
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... FWD MOVE 1 REV MOVE – 25 – Unit MHz FS2 FS1 Search Search ON Up TG2 TG1 1 Gain set 3 Sled mode PS2 PS1 Sled kick + 2 Sled kick + CXA1372BQ/ SENS output FZC A. S TZC SSTOP ...
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... CXA1372BQ/ DIRC = 1 654321 000011 000011 100001 ...
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... GND GND GND GND GND DATA XLT CLK LOCK DV DIRC EE AV SSTOP ISET FSET SL– SL0 SL+ GND GND GND – 27 – CXA1372BQ/BS DEMP LRCK XUGF WDCK GTOP DATA LRCK BCLK BCLK MUTE DATA C2PO BCLK V CC DATA GND LRCK ...
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... The equivalent circuit of FOK output pin is as follows. FOK comparator output is: ≈ near Vcc Output voltage High: V FOKH ≈ Vsat Output voltage Low: V FOKL – prevent overinput. BE Large 20k 50k 100k DGND DGND + DGND (NPN) – 28 – CXA1372BQ/BS Large FOK ...
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... EFM comparator output is: ≈ V Output voltage High: V EFMH ≈ V Output voltage Low: V EFML Vcc MIRR 29 20k V EE DGND – Vsat CC (LPNP) 4.8k 50 EFM 32 700µA 2mA – (NPN) – 4.8 (kΩ) 700 (µA) – (NPN) – 29 – CXA1372BQ/ DGND R L DGND ...
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... FOCUS TRACKING – 30 – CXA1372BQ/BS ...
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... Frequency [Hz] Tracking frequency characteristics = 0.033µ TGU NORMAL GAIN – Frequency [Hz] – 31 – 180 135 –45 –90 NORMAL –135 GAIN DOWN –180 180 120 –60 –120 –180 CXA1372BQ/BS ...
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... COPPER / 42 ALLOY PACKAGE WEIGHT 0.7g 48PIN SDIP (PLASTIC) 600mil + 0.4 – 0.1 43 1.778 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL SDIP-48P-02 LEAD TREATMENT SDIP048-P-0600-A LEAD MATERIAL PACKAGE WEIGHT – 32 – CXA1372BQ/BS + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.1 PLATING 0° to 15° EPOXY RESIN SOLDER PLATING COPPER / 42 ALLOY 5.1g ...