CXA1782 SONY [Sony Corporation], CXA1782 Datasheet - Page 21

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CXA1782

Manufacturer Part Number
CXA1782
Description
RF Signal Processing Servo Amplifier for CD players
Manufacturer
SONY [Sony Corporation]
Datasheet

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Mirror Circuit
The mirror circuit performs peak and bottom hold after the RFI signal has been amplified.
The peak and bottom holds are both held through the use of a time constant. For the peak hold, a time
constant can follow a 30kHz traverse, and, for the bottom hold, one can follow the rotation cycle envelope
fluctuation.
The DC playback envelope signal J is obtained by amplifying the difference between the peak and bottom hold
signals H and I. Signal J has a large time constant of 2/3 its peak value, and the mirror output is obtained by
comparing it to the peak hold signal K. Accordingly, when on the disc track, the mirror output is Low; when
between tracks (mirrored portion), it is High; and when a defect is detected, it is High. The mirror hold time
constant must be sufficiently large compared with the traverse signal.
In the CXA1782, this mirror output is used only during braking operations, and no external output pin is
attached. Accordingly, when connecting DSP such as the CXD2500 with MIRR input pin, input the C. OUT
output to the MIRR input of the DSP.
RF_O
RF_I
31
30
(BOTTOM HOLD)
(MIRROR HOLD)
(PEAK HOLD)
MIRROR AMP
RF
1.4
K
J
I
H
(RF_I)
RF_O
MIRR
G
G
PEAK&
BOTTOM
HOLD
– 21 –
H
I
1
J
MIRROR
COMPARATOR
MIRROR HOLD AMP
20k
K
LOGIC
0V
0V
0V
0V
H
L
29
CP
0.033µ
CXA1782CQ/CR

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