CXA1992 SONY [Sony Corporation], CXA1992 Datasheet

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CXA1992

Manufacturer Part Number
CXA1992
Description
RF Signal Processing Servo Amplifier
Manufacturer
SONY [Sony Corporation]
Datasheet

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Part Number:
CXA1992AR
Manufacturer:
SONY
Quantity:
1 000
Part Number:
CXA1992AR
Manufacturer:
SONY/索尼
Quantity:
20 000
Part Number:
CXA1992BR
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SONY
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Part Number:
CXA1992BR
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SONY
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Part Number:
CXA1992BR
Manufacturer:
SONY/索尼
Quantity:
20 000
Part Number:
CXA1992BR/AR
Manufacturer:
INTERSIL
Quantity:
262
Description
player RF signal processing and servo control.
Features
• Automatic focus bias adjustment circuit
• Automatic tracking balance and gain adjustment
• RF level control circuit
• Interruption countermeasure circuit
• Sled overrun prevention circuit
• Anti-shock circuit
• Defect detection and prevention circuits
• RF 1-V amplifier, RF amplifier
• APC circuit
• Focus and tracking error amplifier
• Focus, tracking and sled servo control circuits
• Focus OK circuit
• Mirror detection circuit
• Single power supply and dual power supplies
Applications
Structure
The CXA1992AR is a bipolar IC developed for CD
circuits
CD players
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
RF Signal Processing Servo Amplifier
– 1 –
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
Recommended Operating Conditions
Operating supply voltage V
CXA1992AR
52 pin LQFP (Plastic)
V
Topr
Tstg
P
CC
D
CC
– V
EE
–65 to +150 °C
–20 to +75 °C
3.0 to 5.5
600
12
E96X16-PS
mW
V
V

Related parts for CXA1992

CXA1992 Summary of contents

Page 1

... RF Signal Processing Servo Amplifier Description The CXA1992AR is a bipolar IC developed for CD player RF signal processing and servo control. Features • Automatic focus bias adjustment circuit • Automatic tracking balance and gain adjustment circuits • RF level control circuit • Interruption countermeasure circuit • Sled overrun prevention circuit • ...

Page 2

... OUTPUT DECODER IFB1-6 FS1-4 TG1-2 TM1-7 PS1-4 BAL1-4 TOG1-4 ISET TM4 TM6 TM7 TM3 TM5 Charge up FSET TG2 CXA1992AR SENS2 26 SENS1 OUT 23 XRST 22 DATA 21 XLT 20 CLK 19 LOCK ISET 16 SL_O 15 SL_M 14 SL_P TM2 ...

Page 3

... CXA1992AR Description Focus error amplifier output. Connected internally to the window comparator input for bias adjustment. Focus error input. Capacitor connection pin for defect time constant. Ground this pin through a capacitor for cutting the focus servo high- frequency gain ...

Page 4

... CXA1992AR Description External time constant setting pin for generating focus search waveform. External time constant setting pin for switching tracking high- frequency gain. External time constant setting pin for switching tracking high-frequency gain ...

Page 5

... CXA1992AR Description Connect an external capacitance to set the current which determines the Focus search, Track jump, and Sled kick heights. Positive power supply. The sled overrun prevention circuit operates when this pin is Low. ...

Page 6

... CXA1992AR Description Input for the defect bottom hold output with capacitance coupled. Defect bottom hold output. Connected internally to the interruption comparator input. 28 Connection pin for defect bottom hold capacitor. Connection pin for MIRR hold capacitor ...

Page 7

... CXA1992AR Description APC amplifier output. APC amplifier input. RF I-V amplifier inverted input. Connect these pins to the photo diode and pins. Bias adjustment of focus error amplifier. Leave this pin open for automatic adjustment ...

Page 8

... CXA1992AR Description I-V amplifier E gain adjustment. (When not using automatic balance adjustment) Negative power supply. Tracking error amplifier output. E-F signal is output. Comparator input for balance adjustment. (Input from TEO through LPF) Tracking error input ...

Page 9

... FZC I Equivalent circuit 1k 147 1k 100k 10µ 10µ 10µ 147 49 75k 120 50 120 VC 10µ 51k 147 52 75k 9k – 9 – Description 100k Window comparator input for ATSC detection. Tracking zero-cross comparator input )/2 direct voltage output Focus zero-cross comparator input. CXA1992AR ...

Page 10

... Output gain difference with V17 IFB4: ON, BIAS0: reference 3B7 1 Output gain difference with V18 IFB5: ON, BIAS0: reference 3AF 1 Output gain difference with V19 IFB6: ON, BIAS0: reference 39F 1 Output gain difference with V20 – 10 – CXA1992AR (V = 1.5V 1.5V, Topr = 25° Min. Typ. Max. 18.4 24.4 34.2 –24.4 –18.4 –34.2 – ...

Page 11

... BAL1 3C4 37 36 I37 = 364µA 3C4 37 36 I37 = 439µA 36 3C4 37 I37 = 515µA 3C4 37 36 0.8mA sink I37 = 515µA, 3C0 37 36 LD: OFF – 11 – CXA1992AR Min. Typ. Max. Unit –35 –20 –5 mV – 8.6 11.6 14.6 dB 11.6 14 ...

Page 12

... Input voltage when TG2 (Pin 10) goes from Vcc/2 to Vcc Input voltage when TG2 (Pin 10 goes from Vcc/2 to Vcc Pin 49 voltage when SENS1 (Pin 25 – 12 – CXA1992AR Min. Typ. Max. Unit mV 300 1020 1510 230 610 1050 mV –1510 –970 –300 mV – ...

Page 13

... Measures at SENS1 pin. 39 Measures at SENS1 pin. 39 Measures at SENS1 pin. 39 Measures at SENS1 pin. 39 – 13 – CXA1992AR Min. Typ. Max –20 –5 –35 350 400 450 260 300 340 –400 –367 –330 50 — — –34 — — 1 1.3 — ...

Page 14

... FOK CC2 CC1 CB CP RF_I RF_O RF_M RFTC LD PD PD1 PD2 – 14 – CXA1992AR TA_O TA_M FSET TG2 TGU SRCH FE_M FE_O FLB FGD FDFCT FEI FEO ...

Page 15

... DRIVER MICRO COMPUTER 0.033µ DSP SENS2 SENS1 25 C. OUT 24 XRST 23 DATA 22 XLT 21 CLK 20 LOCK 19 Vcc 18 Vcc 60k ISET 17 SL_O 16 DRIVER 0.015µ SL_M 15 8.2k SL_P 14 3.3µ 22µ 15k 100k 0.015µ DRIVER CXA1992AR ...

Page 16

... A PD1 C iPD1 B PD2 D iPD2 The low frequency component of the RFO output voltage is V 58k 10k VA 38 PD1 IV AMP VC 58k 10k VB 39 PD2 IV AMP VC = 2.2 RFO – 16 – CXA1992AR 22k RF_M RF_O SUMMING AMP 127.6kΩ (iPD1 + iPD2 ...

Page 17

... FOCUS PHASE VC COMPENSATION VIN > VIN < FOH 20mV VIN VC FOL VL VIN > VIN < –20mV VC iPD1) – (–58kΩ iPD2)} – 17 – CXA1992AR FEO 1 R10 10k FEI 2 R9 10k 2200p GND GND FE_M 7 R11 R8 100k 100k FE_O 6 VC ...

Page 18

... Fix the focus bias adjustment switches to the desired settings. (for example, IFB6 ON) In this condition, adjust the focus bias by turning a volume connected to FE_BIAS (Pin 40). [Example circuit Volume 47k 3. D11 D6 001110 ) < 50mV Variable voltage per 2 steps 40 FE_BIAS – 18 – CXA1992AR ...

Page 19

... VIN < BALH SENS1 20mV 25 VC VIN BALL VL VIN > SENS –20mV VIN < SELECTOR VIN > VIN < TGH 400mV SENS2 VC 26 VIN TGL VL VIN > VIN < XRST VC 23 DATA 22 COMAND COMAND CONTROL CONTROL XLT 21 CLK 20 CXA1992AR CPU ...

Page 20

... When the TEO signal level is low and TGH (SENS1 pin) does not go Low, the gain should be raised with the TGFL command for adjustment. If the adjustment does not bring the result of Low, check the pulse duty of TGL (SENS2 pin). V < V < < (2) (3) H – 20 – D11 D6 001100 ) < D11 D6 001101 ) CXA1992AR ...

Page 21

... C3 R7 1.47V 39.5k 33 RF_O R9 23. R13 and controlling the laser power in sync with the L according to the results of comparison with the L V variable range L – 21 – LDON R12 56k VREF LPC ON/OFF R14 12.5k 50%/17% 670mV 1µ CXA1992AR ...

Page 22

... Center Voltage Generation Circuit (The figure below shows a single voltage application; Connect to GND for dual power supplies.) Maximum current is approximately ±3mA. Output impedance is approximately 50Ω 30k 30k V EE Connected internally to the pin. EE – 22 – CXA1992AR V CC GND ...

Page 23

... DFCT FS4 68k Focus FS3 phase Compensation 40k FLB FSET 5 11 0.015µ 0.1µ 510k – 23 – 25 SENS1 FE_O 100k 6 100k 50k FE_M 7 11µ 22µ 60k ISET 17 50k FS1 FS2 Charge up SRCH 8 4.7µ . However, changing EE 15%. CXA1992AR FOCUS COIL ...

Page 24

... OFF. The peak frequency of the tracking phase compensation is approximately 1.2kHz when a 510kΩ resistance is connected to Pin 11. In the CXA1992AR, TG1 and TG2 are inter-linked switches. To jump tracks in FWD and REV directions, turn TM3 or TM4 ON. During this time, the peak voltage applied to the tracking coil is determined by the TM3 or TM4 current and the feedback resistance from Pin 12 ...

Page 25

... Sled kick current (TM5 and TM6 current, when during 1X$ commands Use external resistance of between 30kΩ to 240kΩ. Using external resistance outside this range may cause oscillation approximately 1.27V – 25 – CXA1992AR ...

Page 26

... V RFI RFO 0.033µ CC1 29 DEFECT COMPARATOR DEFECT BOTTOM HOLD 30 CB 0.01µ – 26 – 20k FOK 27 FOCUS OK COMPARATOR CC2 28 DFCT2 FLIP FLOP 26 SENS2 c e SENS SELECTOR 25 SENS1 d DFCT1 DEFECT SW d BOTTOM HOLD (2) dotted line CC2 H L CXA1992AR ...

Page 27

... High; and when a defect is detected High. The mirror hold time constant must be sufficiently large compared with the traverse signal. In the CXA1992AR, this mirror output is used only during braking operations, and no external output pin is attached. Accordingly, when connecting DSP with MIRR input pin, input the C.OUT output to the MIRR input of the DSP ...

Page 28

... (HIGH-Z) DATA – 28 – 26 SENS2 SENS2 H (HIGH-Z) DFCT2 MIRR H (HIGH-Z) SENS1 SENS2 BALH BALL X X TGH TGL X X FOH FOL ATSC (HIGH-Z) CXA1992AR ...

Page 29

... The input data to operate this IC is configured as 8-bit/12-bit data; however, below, this input data is represented by 2-digit hexadecimal numerals in the form $XX, where hexadecimal numeral between 0 and F/$XXX for 12-bit. Commands for the CXA1992AR can be broadly divided into four groups ranging in value from $0X, $1X, $2X, $3XX. 1. $0X (FZC at SENS1 pin (Pin 25), H (Hi-Z) at SENS2 pin (Pin 26)) These commands are related to focus servo control ...

Page 30

... Drive voltage Focus error SENS1 (FZC) Focus OK A Fig. 3. S-curve (20ms) (200ms) $02 $03 $08 The instant when the signal is brought into focus. Fig. 4. Focus ON timing chart – 30 – t The broken lines in the figure indicate the voltage assuming the signal is not in focus. CXA1992AR ...

Page 31

... RF envelope and the tracking error is 180° out-of-phase to cut the unneeded portion of the tracking error and apply braking TG1, TG2 Break Sled kick circuit ON/OFF ON/OFF – 31 – Transfer $ YES FZC ? NO YES Latch (B) Sled kick height D1 (PS1) (PS0 height 1 1 CXA1992AR D0 0 ±1 1 ±2 0 ±3 1 ±4 ...

Page 32

... Edge Detection (Latch) CXA1992 From outer to inner track Fig. 7. Internal waveform Tracking control 00 off 01 Servo ON 10 F-JUMP 11 R-JUMP TM1, TM3, TM4, – 32 – CXA1992AR D2 TM7 Low: open High: make [ H] ("MIRR") ("TZC") Braking is applied from here Sled control 00 off 01 Servo ON 10 ...

Page 33

... and sending a latch pulse with and START C.OUT is the frequency high BAL1 to BAL4 enough ? Switch Control SENS1/2 Balance OK ? Adjustment Completed Balance adjustment TOG1 to TOG4 Switch control NO Adjustment Completed Gain adjustment – 33 – NO YES START SENS1/2 GAIN OK ? YES CXA1992AR ...

Page 34

... LDON The laser diode can be turned ON and OFF by setting D2 with and The laser diode is ON with and OFF with IFB1 to 6 Switch Control BIAS YES Adjustment Completed Focus bias adjustment method – 34 – START SENS1/2 CXA1992AR ...

Page 35

... When LOCK is not used, Pin 19 (LOCK) should be pulled side and TG2 is OFF. Even if TG1 and TG2 are NORMAL mode, TM2 SW: side SLED ON TM2 SW: side SLED OFF UP TG1 SW: side TG2 OFF NORMAL TG1 SW: side TG2 ON – 35 – with the resistor of approximately 47kΩ. CC CXA1992AR ...

Page 36

... Low level input voltage V IL High level input voltage WCK Min. Typ. 500 500 500 500 1000 1000 (V 0 – 0 – 36 – 3.0V) CC Max. Unit 1 MHz – 0 CXA1992AR D0 ...

Page 37

... CXA1992AR ...

Page 38

... CXA1992AR ...

Page 39

... CXA1992AR 1: OFF 0: ON • FS2 OFF • FS4 In the Block Diagram: 1:SW side 0:SW side In the Block Diagram: 1:SW side 0:SW side • TG2 1: OFF 0: ON • BRAKE When D2 in Fig. 6 is: ...

Page 40

... CXA1992AR TM1 Notes) • TM1/TM2 the Block Diagram: 0 1:SW side 0 0:SW side • TM3/TM4/TM5/TM6 OFF ...

Page 41

... CXA1992AR RDF INT ATSC LDON LPCL LPC DFCT CT2 — — — — — — — — — — — — — — ...

Page 42

... CXA1992AR RDF INT ATSC LDON LPCL LPC DFCT CT2 — — — — — — — — — — — — — — — ...

Page 43

... CXA1992AR RDF INT ATSC LDON LPCL LPC DFCT CT2 — — — — — — — — — — — — — — — — ...

Page 44

... CXA1992AR RDF INT ATSC LDON LPCL LPC DFCT CT2 — — — — — — — — — — — — — — — — ...

Page 45

... CXA1992AR RDF INT ATSC LDON LPCL LPC DFCT CT2 ...

Page 46

... — — — — — — — CXA1992AR 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — ...

Page 47

... D10 – 47 – HEX $20 DATA HEX $300 $340 $380 $3D0 CXA1992AR ...

Page 48

... Vsat (NPN Measurement pin Conditions C FLB 6 C FGD 13 C TGU 13 13 and controlling the laser power in sync with the L – 48 – 20k FOK Typ. Unit 21 0.1µF = 0.1µF 63 deg 13 dB –125 deg = 0.1µF 26.5 dB –130 deg CXA1992AR L ...

Page 49

... EIAJ CODE JEDEC CODE 52PIN LQFP(PLASTIC) 12.0 ± 0.2 10.0 ± 0 0.65 0.13 M 0.25 0.1 ± 0.1 0° to 10° DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL LQFP-52P-L01 LEAD TREATMENT LQFP052-P-1010 LEAD MATERIAL PACKAGE MASS – 49 – + 0.1 1 0.08 0.32 – 0.07 (0.3) DETAIL B EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.3g CXA1992AR ...

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