EP220 ALTERA [Altera Corporation], EP220 Datasheet
EP220
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EP220 Summary of contents
Page 1
... The EPROM-based EP220 and EP224 devices feature a flexible I/O architecture and implement 150 usable (300 available) gates of custom Description user logic functions. EP220 and EP224 devices can be used as upgrades for high-speed bipolar programmable logic devices (PLDs) or for 74-series LS and CMOS (SSI and MSI) logic devices in high-performance microcomputer systems ...
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... These devices improve performance and decrease system noise, power consumption, and heat generation. Figure 1 shows block diagrams of the EP220 and EP224 device architectures. The EP220 has 10 dedicated inputs and 8 I/O pins; the EP224 has 14 dedicated inputs and 8 I/O pins combinatorial mode, and higher Altera Corporation ...
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... Each I/O pin can be programmed to function as an input, output, or bidirectional pin. The EP220 and EP224 device architecture offers the following features: Macrocells High-frequency, low-skew global Clock EP220 & EP224 Classic EPLDs ...
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... I/O pin through the output buffer, and can be used for bidirectional I/O. Unlike PAL and GAL devices, all eight outputs on the EP220 and EP224 allow a combinatorial feedback signal from the I/O pin to feed the logic array. Data is clocked into the macrocell’s D register on the rising edge of the global Clock ...
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... DeMorgan’s inversion to reduce the number of product terms needed to implement a function. If the EP220 and EP224 register outputs do not require an OE signal, the internal product term can hold the output in an enabled state global OE signal is required, any input can be dedicated to the task, and all eight product terms can be programmed accordingly ...
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... EP220 & EP224 Classic EPLDs 6 Table 1. EP220- and EP224-Compatible Devices (Part PAL/GAL Vendor PAL/GAL Device Advanced Micro PAL16L8D Devices (continued) PAL16R8D PAL16R8-7 PALCE16V8 PAL20L8-10 PAL20R8-10 PAL20R8-7 PALCE20V8 PAL16L8 PAL16R8 PALCE16V8 PAL20L8 PAL20R8 PALCE20V8 Lattice GAL16V8B Semiconductor GAL20V8B Corp. GAL16V8A GAL16V8B ...
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... Altera Corporation Table 1. EP220- and EP224-Compatible Devices (Part PAL/GAL Vendor PAL/GAL Device National PAL16L8 Semiconductor PAL16R8 (continued) GAL16V8A PAL20L8 PAL20R8 GAL20V8A Philips PLUS16L8 Semiconductor PLUS16R8 PLUS20L8 PLUS20R8 PLUS16L8 PLUS16R8 PLUS20L8 PLUS20R8 PLUS16L8D PLUS16R8D PLUS16R8-7 PLUS20L8-10 PLUS20R8-10 PLUS20R8-7 PLUS16L8 PLUS16R8 PLUS20L8 ...
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... Bit that controls this function, as well as all other program data, is reset when a device is erased. Turbo Bit The -10A and -12 speed grades of the EP220 and EP224 devices contain a programmable Turbo Bit to control the automatic power-down feature that enables the low-standby-power mode (I turned on, the low-standby-power mode is disabled. All AC values are tested with the Turbo Bit turned on ...
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... The EP220 is supported by the Altera MAX+PLUS II development software, Altera programming hardware, and third-party hardware. Both the EP220 and EP224 are supported by the Altera PLDshell Plus design software, third-party logic compilers (e.g., ABEL, CUPL, PLDesigner, LOG/IC, and iPLS II), and third-party programming hardware (e.g., Data I/O) ...
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... EP220 and EP224 devices. Figure 4. EP220 & EP224 I CC 100 -7A Speed Grade 70 Turbo 40 10 Figure 5 shows the output drive characteristics of EP220 and EP224 I/O pins. Figure 5. EP220 & EP224 Output Drive Characteristics 100 versus frequency for CC vs. Frequency ...
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... Max., GND < Max OUT Conditions 1.0 MHz 1.0 MHz OUT 1.0 MHz OUT V on pin 11 (EP220) and pin 13 PP (EP224 1.0 MHz EP220 & EP224 Classic EPLDs Min –2.0 –0.5 –65 –10 Min 4. –40 Min 2.0 – ...
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... Absolute values with respect to device GND; all over- and undershoots due to system or tester noise are included. (7) For -7A, -10A, -12 speed grades for EP220 and EP224 devices: maximum DC I For -7, -10 speed grades for EP220 and EP224 devices: test 1 output at a time; test duration should not exceed 1 s. (8) These values are measured during initial characterization. V (9) Measured with a device programmed as an 8-bit counter ...
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... Operating conditions (2) If the device enters standby mode and remains inactive for approximately 75 ns, increase the time by the amount shown. For EP220-10A, EP220-12, and EP224-10A, EP224-12 devices only. (3) Measured with all outputs switching. (4) The t and t parameters are measured at 0.5 V from steady-state voltage that is driven by the specified ...
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... EP220 & EP224 Classic EPLDs AC Operating Conditions: -7 & -10 Speed Grades Combinatorial Mode Symbol t Input or I/O to non-registered output, inversion on, PD1 t Input or I/O to non-registered output, inversion off, PD2 t Input or I/O to output enable, PZX t Input or I/O to output disable, PXZ t Register mode output-to-output skew ...
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... Package Outlines Altera Corporation Figure 6 shows the package pin-outs for EP220 and EP224 devices. Figure 6. EP220 & EP224 Package Pin-Outs Package outlines not drawn to scale. Windows in ceramic packages only. INPUT/CLK 1 20 VCC INPUT 2 19 I/O INPUT 3 18 I/O INPUT 4 17 I/O INPUT 5 16 I/O INPUT ...
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... Altera Corporation. Altera customers are advised to obtain the latest version of (408) 894-7104 device specifications before relying on any published information and before placing orders for products or services. Literature Services: (408) 894-7144 Copyright 16 Printed on Recycled Paper. summarizes the availability of EP220 and EP224 devices. Altera Speed Package Grade -10A 20-pin CerDIP -7 20-pin PDIP -10 ...