HY5DU281622ETP-25 HYNIX [Hynix Semiconductor], HY5DU281622ETP-25 Datasheet

no-image

HY5DU281622ETP-25

Manufacturer Part Number
HY5DU281622ETP-25
Description
128M(8Mx16) gDDR SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
HY5DU281622ETP
128M(8Mx16) gDDR SDRAM
HY5DU281622ETP
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.0 / Oct. 2005
1

Related parts for HY5DU281622ETP-25

HY5DU281622ETP-25 Summary of contents

Page 1

... HY5DU281622ETP 128M(8Mx16) gDDR SDRAM This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / Oct. 2005 HY5DU281622ETP 1 ...

Page 2

... Revision No. 0.1 Defined target spec. 0.2 Supports Lead free parts for each speed grade 0.3 166Mhz speed bin delete, AC parameter change (tRC_APCG at 200Mhz) 1.0 Added Sentence to relate Power Up Sequence Rev. 1.0 / Oct. 2005 History 1HY5DU281622ETP Draft Date Remark July 2003 Oct. 2003 Jan. 2005 Oct. 2005 2 ...

Page 3

... Source synchronous - data transaction aligned to bidirectional data strobe (UDQS,LDQS) • Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) • Data(DQ) and Write masks(DM) latched on the both ORDERING INFORMATION Part No. HY5DU281622ETP-25 HY5DU281622ETP-26 HY5DU281622ETP-28 VDD/VDDQ=2.8V HY5DU281622ETP-30 HY5DU281622ETP-33 HY5DU281622ETP-36 HY5DU281622ETP-4 VDD/VDDQ=2.5V HY5DU281622ETP-5 Note) Hynix supports Lead free parts for each speed grade with same specification, except Lead free material. We'll add " ...

Page 4

... X 875mil 16 66pin TSOP - 0.65mm pin pitch ROW AND COLUMN ADDRESS TABLE ITEMS Organization Row Address Bank Address Refresh 1HY5DU281622ETP 66 VSS 65 DQ15 64 VSSQ 63 DQ14 62 DQ13 61 VDDQ DQ12 60 DQ11 59 VSSQ 58 57 DQ10 56 DQ9 55 VDDQ 54 DQ8 ...

Page 5

... Used to capture write data. LDQS corresponds to the data on DQ0-Q7; UDQS corresponds to the data on DQ8-Q15 Data input / output pin : Data Bus Power supply for internal circuits and input buffers. Power supply for output buffers for noise immunity. Reference voltage for inputs for SSTL interface. No connection. 1HY5DU281622ETP 5 ...

Page 6

... Rev. 1.0 / Oct. 2005 Write Data Register 2-bit Prefetch Unit 32 Bank 2Mx16/Bank0 Control 2Mx16/Bank1 2Mx16/Bank2 2Mx16/Bank3 Row Decoder Column Decoder Column Address Counter CLK /CLK Register 1HY5DU281622ETP LDQS, UDQS Data Strobe CLK_DLL Transmitter LDQS Data Strobe UDQS Receiver DLL Block Mode DS DQ[0:15] 6 ...

Page 7

... 1HY5DU281622ETP A10/ CAS WE ADDR code code ...

Page 8

... LDM corresponds to the data on DQ0-Q7 and UDM corresponds to the data on DQ8-Q15 3. In here, Don’t Care means logical value only, it doesn’t mean ’Don’t care for DC level of each signals’. DC level should be out IHmin ILmax Rev. 1.0 / Oct. 2005 /CS, /RAS, CKEn /CAS, / 1HY5DU281622ETP A8 ADDR Note 1,2,3 1,2,3 8 ...

Page 9

... OPCODE BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP 1HY5DU281622ETP Command Action DSEL NOP or power down NOP NOP or power down BST ILLEGAL ILLEGAL ILLEGAL ACT Row Activation PRE/PALL NOP AREF/SREF Auto Refresh or Self Refresh MRS Mode Register Set ...

Page 10

... BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP OPCODE 1HY5DU281622ETP Command Action ACT ILLEGAL PRE/PALL Term burst, precharge AREF/SREF ILLEGAL MRS ILLEGAL DSEL Continue burst to end NOP Continue burst to end BST ILLEGAL ILLEGAL ILLEGAL ACT ILLEGAL ...

Page 11

... OPCODE BA, CA, AP READ/READAP 1HY5DU281622ETP Command Action DSEL NOP - Enter ROW ACT after tRCD NOP NOP - Enter ROW ACT after tRCD BST ILLEGAL ILLEGAL ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ILLEGAL MRS ILLEGAL DSEL ...

Page 12

... H BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP OPCODE 1HY5DU281622ETP Command Action ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ILLEGAL MRS ILLEGAL DSEL NOP - Enter IDLE after tMRD NOP NOP - Enter IDLE after tMRD BST ILLEGAL ILLEGAL ILLEGAL ...

Page 13

... 1HY5DU281622ETP /ADD Action X INVALID X Exit self refresh, enter idle after tSREX X Exit self refresh, enter idle after tSREX X ILLEGAL X ILLEGAL X ILLEGAL X NOP, continue self refresh X INVALID X Exit power down, enter idle ...

Page 14

... IDLE SREX PDEN PDEX AREF ACT POWER DOWN PDEN PDEX BANK ACTIVE WRITE READ WITH WITH AUTOPRE- AUTOPRE- CHARGE CHARGE WRITE PRE- CHARGE POWER-UP POWER APPLIED 1HY5DU281622ETP SELF REFRESH AUTO REFRESH BST READ READAP READ WRITEAP PRE(PALL) Command Input Automatic Sequence 14 ...

Page 15

... Issue Mode Register Set (MRS) to reset DLL and set device to idle state with bit A8=high. (An additional 200 cycles(tXSRD) of clock are required for locking DLL) Rev. 1.0 / Oct. 2005 Sequencing Voltage relationship to avoid latch-up After or with VDD After or with VDDQ After or with VDDQ 1HY5DU281622ETP < VDD + 0.3V < VDDQ + 0.3V < VDDQ + 0.3V 15 ...

Page 16

... CODE CODE CODE tRP tMRD tMRD EMRS Set MRS Set Precharge All Precharge All Reset DLL (with A8=H) * 200 cycle(tXSRD are required (for DLL locking) before Read Command 1HY5DU281622ETP AREF MRS ACT CODE CODE CODE CODE CODE CODE tRP tRFC tMRD ...

Page 17

... Yes CAS Latency Reserved Reserved Reserved Reserved Reserved 1HY5DU281622ETP Burst Length Burst Length Sequential Reserved Reserved Reserved ...

Page 18

... Interleave ...

Page 19

... This device supports both Half strength driver and Matched impedance driver, intended for lighter load and/or point-to- point environments. Half strength driver is to define about 50% of Full drive strength which is specified to be SSTL_2, Class II, and Matched impedance driver, about 30% of Full drive strength. Rev. 1.0 / Oct. 2005 1HY5DU281622ETP 19 ...

Page 20

... All bits in RFU address fields must be programmed to Zero, all other states are reserved for future usage. Rev. 1.0 / Oct. 2005 RFU 1HY5DU281622ETP DLL A0 DLL enable 0 Enable 1 Diable Output Driver Impedance Control Full Half (60%) Reserved Weak (33%) 20 ...

Page 21

... DDQ 0.15 IH REF V -0 0.04 TT REF V 0.49*V 0.5*V REF DDQ . DD o (TA Voltage referenced to V Min 0. =0V. IN 1HY5DU281622ETP Rating -55 ~ 125 -0.5 ~ 3.6 -0.5 ~ 3.6 -0 260 ⋅ 0V) SS Typ Max Unit 2.5 2.625 V 2.5 2.625 V 2.8 2.9 V 2.8 2 0.3 V DDQ - V - 0.15 V REF 0.04 V REF REF 0 ...

Page 22

... I =0mA All banks active ≥ (min), RC RFC All banks active CKE ≤ 0.2V Four bank interleaving with BL=4, Refer to the following page for detailed test condition 1HY5DU281622ETP = 0V) SS Speed 230 220 210 200 190 230 220 210 ...

Page 23

... I =0mA All banks active ≥ (min), RC RFC All banks active CKE ≤ 0.2V Four bank interleaving with BL=4, Refer to the following page for detailed test condition 1HY5DU281622ETP = 0V) SS Speed Unit 180 170 160 mA 180 170 160 ...

Page 24

... C, Voltage referenced to V Symbol Min 0.45 IH(AC) REF V IL(AC) V 0.7 ID(AC) V 0.5*V -0.2 IX(AC) DDQ of the transmitting device and must track variations in the DC level of the same. DDQ o (TA Voltage referenced to VSS = 0V 1HY5DU281622ETP = 0V) SS Max Unit Note 0.45 V REF V + 0.6 V DDQ 0.5*V +0.2 V DDQ Value Unit V x 0.5 V DDQ ...

Page 25

... The area between the overshoot signal and GND must be less than or equal to(See below Fig Volts ( Max. area=2.4V-ns -3 Rev. 1.0 / Oct. 2005 Parameter Time(ns) Parameter Time(ns) 1HY5DU281622ETP 200MHz Specifications 1.5 V 1.5 V 4.5 V-nS 4.5 V-nS Max. amplitude=1. Ground 5 6 200MHz Specifications 1.2 V 1.2 V 2.4 V-nS 2.4 V-nS Max. amplitude=1. Ground ...

Page 26

... CL 0.45 0. 0.45 0. -0.55 0.55 t DQSCK -0.55 0.55 t DQSQ - 0.35 tHPmin -tQHS tCH min t - 0.35 QHS DQSH 0.4 0.6 t DQSL 0.4 0.6 t 0.85 1.15 DQSS 0.35 - 1HY5DU281622ETP 26 28 Min Max Min Max 100K 14 100K 2 2.8 6 0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55 -0.6 ...

Page 27

... Signal transitions through the DC region must be monotonic. Rev. 1.0 / Oct. 2005 25 Symbol Min Max Min tDSS 3.0 - 3.0 tDSH 3.0 - 3.0 t WPRES WPREH 0.35 - 0.35 t WPST 0.4 0.6 0.4 t MRD 200 - 200 XSC 2tCK 2tCK t - PDEX + tIS + tIS t REFI - 7.8 - 1HY5DU281622ETP 26 28 Unit Note Max Min Max 0.6 0.4 0 200 - 2tCK tIS us 7 ...

Page 28

... CL 0.45 0.55 t -0.6 0 DQSCK -0.6 0.6 t DQSQ - 0.35 tHPmin -tQHS tCH min t QHS - 0. DQSH 0.4 0.6 t DQSL 0.4 0.6 t DQSS 0.85 1. tDSS 0.3 - tDSH 0 RPRE 0.9 1.1 1HY5DU281622ETP 33 36 Min Max Min Max 100K 11 100K 3.3 6 3.6 10 0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55 -0 ...

Page 29

... Signal transitions through the DC region must be monotonic. Rev. 1.0 / Oct. 2005 30 Symbol Min Max Min t 0.4 0.6 0.4 RPST WPRES t WPREH 0.35 - 0.35 t WPST 0.4 0.6 0.4 t MRD 200 - 200 XSC 2tCK 2tCK t PDEX - + tIS + tIS t REFI - 7.8 - 1HY5DU281622ETP 33 36 Unit Note Max Min Max CK 0.6 0 0.6 0.4 0 200 - 1tCK tIS us 7 ...

Page 30

... DRL t DAL 0. -0.6 t DQSCK -0.6 t DQSQ - tHPmin t QH -tQHS tCH min t - QHS t 0. 0.75 t DQSH 0.4 t DQSL 0.4 t 0.85 DQSS 0.4 tDSS 0.3 1HY5DU281622ETP 4 5 Unit Max Min Max - 100K 8 100K - 0.55 0.45 0.55 0.55 0.45 0.55 0.6 -0.65 0.65 0.6 -0.55 0.55 0.4 - 0.4 tHPmin ...

Page 31

... Signal transitions through the DC region must be monotonic. Rev. 1.0 / Oct. 2005 4 Symbol Min Max tDSH 0 0.9 1.1 RPRE t RPST 0.4 0.6 t WPRES WPREH 0. 0.4 0.6 WPST MRD t XSC 200 - 1tCK t - PDEX + tIS t - 7.8 REFI 1HY5DU281622ETP 5 Unit Note Min Max CK 0 0.9 1.1 CK 0 0.4 0 200 - 4 1tCK tIS us - 7.8 31 ...

Page 32

... Rev. 1.0 / Oct. 2005 tRC_APCG tRFC tRAS tRCDRD 1HY5DU281622ETP tRCDWR tRP tDAL Unit ...

Page 33

... These values are guaranteed by design and are tested on a sample basis only. OUTPUT LOAD CIRCUIT Output Rev. 1.0 / Oct. 2005 Pin CK, /CK All other input-only pins DQ, DQS /2, V peak-to-peak = 0.2V O DDQ =50Ω T Zo=50Ω V REF C =30pF L 1HY5DU281622ETP Symbol Min Max Unit ...

Page 34

... PACKAGE INFORMATION 400mil 66pin Thin Small Outline Package 0.65 (0.0256) BSC 1.194 (0.0470) 0.991 (0.0390) Rev. 1.0 / Oct. 2005 BASE PLANE 22.33 (0.879) 22.12 (0.871) 0.35 (0.0138) 0.25 (0.0098) SEATING PLANE 1HY5DU281622ETP Unit : mm(Inch) 11.94 (0.470) 11.79 (0.462) 10.26 (0.404) 10.05 (0.396 Deg. 0.15 (0.0059) 0.597 (0.0235) 0.210 (0.0083) 0.05 (0.0020) 0.406 (0.0160) ...

Related keywords