AX88772 ASIX [ASIX Electronics Corporation], AX88772 Datasheet

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AX88772

Manufacturer Part Number
AX88772
Description
USB to 10/100 Fast Ethernet/HomePNA Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet

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Product Description
The AX88772 USB to 10/100 Fast Ethernet/HomePNA/HomePlug controller is a high performance and highly integrated
ASIC with embedded 28KB SRAM for packet buffering. It enables low cost and affordable Fast Ethernet network
connection to desktop, notebook PC, and embedded system using popular USB ports. It has an USB interface to
communicate with USB host controller and is compliant with USB specification V1.0, V1.1 and V2.0. It implements
10/100Mbps Ethernet LAN function based on IEEE802.3, and IEEE802.3u standards or HomePNA standard. It
integrates an on-chip 10/100Mbps Ethernet PHY to simplify system design and provides an optional media-independent
interface (MII) for implementing Fast Ethernet and HomePNA functions.
System Block Diagram
Features
ASIX ELECTRONICS CORPORATION
4F, NO.8, Hsin Ann Rd., Science-Based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No
liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Single chip USB to 10/100 Fast Ethernet and
HomePNA and HomePlug Network Controller
Integrates on-chip 10/100Mbps Fast Ethernet PHY
USB specification 1.0 and 1.1 and 2.0 compliant
Supports USB Full and High Speed modes with Bus
power capability
Supports 4 endpoints on USB interface
High performance packet transfer rate over USB
bus using proprietary burst transfer mechanism
(submitted for US patent application)
IEEE
compatible
Embedded 20KB SRAM for RX packet buffering
and 8KB SRAM for TX packet buffering
Supports
operation in Fast Ethernet
Provides optional MII interface for Ethernet PHY
and HomePNA/ HomePlug PHY interface
802.3
both
10BASE-T
Always contact ASIX for possible updates before starting a design.
Magnetic
RJ45
full-duplex
and
AX88772
and
USB to 10/100 Fast Ethernet/HomePNA Controller
100BASE-TX
half-duplex
10/100 PHY (FX)
Magnetic
RJ45
USB I/F
FAX: 886-3-579-9558
*IEEE is a registered trademark of the Institute of Electrical and
*All other trademarks and registered trademark are the property of their
Electronic Engineers, Inc.
respective holders.
Supports Suspend mode and Remote Wakeup via
Link-up, Magic packet, or external pin
Optional PHY power down during Suspend mode
Supports 256/512 bytes (93c56/93c66) of serial
EEPROM (for storing USB Descriptors)
Supports automatic loading of Ethernet ID, USB
Descriptors and Adapter Configuration from
EEPROM after power-on initialization
External PHY loop-back diagnostic capability
Integrates on-chip 3.3V to 2.5V voltage regulator
and requires only single power supply: 3.3V
Small form factor with 128-pin LQFP package
12MHz and 25Mhz clock input from either crystal
or oscillator source
Operating temperature range: 0°C to 70°C.
Document No: AX88772_07/6/21/05
Home LAN PHY
EEPROM
Magnetic
RJ11
Released Date: 6/21/2005
http://www.asix.com.tw/
AX88772

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AX88772 Summary of contents

Page 1

... HomePNA/ HomePlug PHY interface Product Description The AX88772 USB to 10/100 Fast Ethernet/HomePNA/HomePlug controller is a high performance and highly integrated ASIC with embedded 28KB SRAM for packet buffering. It enables low cost and affordable Fast Ethernet network connection to desktop, notebook PC, and embedded system using popular USB ports. It has an USB interface to communicate with USB host controller and is compliant with USB specification V1 ...

Page 2

... INTRODUCTION ................................................................................................................4 1 ENERAL ESCRIPTION 1.2 AX88772 B D LOCK IAGRAM 1.3 AX88772 P D INOUT IAGRAM 2.0 SIGNAL DESCRIPTION ....................................................................................................6 3.0 FUNCTION DESCRIPTION ............................................................................................10 3.1 USB C I ORE AND NTERFACE 3.2 10/100 E PHY.........................................................................................................10 THERNET 3.3 MAC C ...........................................................................................................................10 ORE 3 TATION ANAGEMENT 3 ................................................................................................................11 EMORY RBITER 3.6 USB THERNET RIDGE 3.7 S EEPROM L ERIAL OADER 3 I/O..........................................................................................................11 ...

Page 3

... S EEPROM T ERIAL 9.0 PACKAGE INFORMATION............................................................................................39 10.0 ORDERING INFORMATION ......................................................................................40 APPENDIX A: SYSTEM APPLICATIONS .................................................................................41 A.1 USB AST THERNET A.2 USB AST THERNET AND REVISION HISTORY .................................................................................................................... AX88772 B D IGURE LOCK F 2: AX88772 P D IGURE INOUT IGURE NTERNAL ATAPATH IGURE NTERNAL ONTROL ...

Page 4

... Ethernet PHY to simplify system design and provides an optional media-independent interface (MII) for implementing Fast Ethernet and HomePNA functions. The AX88772 needs 12MHz clock for USB operation and 25Mhz clock for Fast Ethernet operation 128-pin LQFP low profile package with CMOS process and requires only single 3.3V power supply to operate. ...

Page 5

... AX88772 Pinout Diagram The AX88772 is housed in the 128-pin LQFP package VDD3 VDD3 VDD3 GND GND GND VDDK VDDK VDDK 100 100 100 GND GND GND 101 101 101 DB4 ...

Page 6

... Receive Error. RX_ER is driven synchronously with respect to RX_CLK by PHY asserted high for one or more RX_CLK periods to indicate to the MAC that an error has detected. 116 Collision Detected. COL is driven high by PHY when the collision is detected. 6 AX88772 Pin Description ASIX ELECTRONICS CORPORATION ...

Page 7

... Full-Duplex LED indicator. This pin drives low when the Ethernet PHY is in full-duplex mode and drives high when in half duplex mode. Ethernet speed LED indicator. This pin drives low when the Ethernet PHY is in 100BASE-TX mode and drives high when in 10BASE-T mode. Misc. Pins 7 ASIX ELECTRONICS CORPORATION AX88772 ...

Page 8

... VDDAH directly to enable on-chip regulator. Connect this pin to GNDAH to disable on-chip regulator. 3.3V Power supply to on-chip 3.3V to 2.5V voltage regulator. Ground pin of on-chip 3.3V to 2.5V voltage regulator. 2.5V voltage output of on-chip 3.3V to 2.5V voltage regulator. Power and Ground Pins Digital Core Power. 2.5V. Digital I/O Power. 3.3V. Digital Ground. Analog Core Power. 2.5V. 8 ASIX ELECTRONICS CORPORATION AX88772 ...

Page 9

... AGND P 29, 33, 38, 50, 54, 55, 60, 63, 67, 69 USB to 10/100 Fast Ethernet/HomePNA Controller Analog Ground. 9 ASIX ELECTRONICS CORPORATION AX88772 ...

Page 10

... PHY and gathering status from the PHY. The station management interface allows USB to 10/100 Fast Ethernet/HomePNA Controller 10/100 Ethernet PHY 10 ASIX ELECTRONICS CORPORATION AX88772 RXIP/RXIN TXOP/TXON MII Interface I/O: RX_CLK, RXD [3:0], RX_DV, RX_ER, COL, CRS TX_CLK, TXD [3:0], TX_EN, TX_ER ...

Page 11

... The serial EEPROM loader is responsible for reading configuration data automatically from external serial EEPROM after power-on reset. 3.8 General Purpose I/O There are 3 general purpose I/O pins provided by this ASIC. USB to 10/100 Fast Ethernet/HomePNA Controller 10/100 Ethernet PHY Phy ID = 1_0000 11 AX88772 MDC MDIO ASIX ELECTRONICS CORPORATION ...

Page 12

... EEPROM Offset of Interface 1/1 String Phy Register Offset for Interrupt Endpoint Primary Phy_Type [7:5] and Phy_ID [4:0] EEPROM Offset of Full-Speed Device Descriptor EEPROM Offset of Full-Speed Configuration Table 2: Serial EEPROM Memory Map 12 AX88772 LOW BYTE Word Count For Preload Descriptor Node ID 0 Node ID 2 Node ID 4 ...

Page 13

... Detailed Description The following sections provide detailed description for some of the field in serial EEPROM memory map, for other fields not covered here, please refer to AX88772L application note for more details. 4.1.1 Word Count for Preload (00h) The number of words to be preloaded by the EEPROM loader = 15h. ...

Page 14

... Phy Register Offset 1 Bit 4 Bit 3 Bit 2 Phy Register Offset 2 Total free buffer count = 80 Stop sending Pause frame when free buffer > Low Water Mark Start sending Pause frame when free buffer < High Water Mark 0 14 AX88772 Bit 9 Bit 8 Bit 1 Bit 0 ASIX ELECTRONICS CORPORATION ...

Page 15

... Write to Phy_ID of 00h with Phy register offset 00h to power down all Phys attached to station management interface. 2. Write to Primary Phy_ID with Phy register offset 00h to power down Primary Phy. 3. Write to Secondary Phy_ID with Phy register offset 00h to power down Secondary Phy. USB to 10/100 Fast Ethernet/HomePNA Controller 15 ASIX ELECTRONICS CORPORATION AX88772 ...

Page 16

... USB Configuration Structure 5.1 USB Configuration The AX88772 supports 1 Configuration only. 5.2 USB Interface The AX88772 supports 1 interface. 5.3 USB Endpoints The AX88772 supports following 4 endpoints: Endpoint 0: Control endpoint used for configuring the device, e.g., standard commands and vendor commands, etc. Endpoint 1: Interrupt endpoint used for reporting status. ...

Page 17

... USB Commands There are three command groups for Endpoint 0 (Control Endpoint) in AX88772: The USB standard commands The USB vendor commands The USB Communication Class commands 6.1 USB Standard Commands The Language ID is 0x0904 for English PPLL means buffer length CC means configuration number ...

Page 18

... Data stage Read GPIOs Status Register No data in Data stage Write GPIOs Register No data in Data stage Write Software Reset Register 1 bytes in Data stage Read Software PHY Select Status Register No data in Data stage Write Software PHY Select Register 18 AX88772 Description ASIX ELECTRONICS CORPORATION ...

Page 19

... JJ [7:0] in Data stage KK [7:0] in Data stage Bit4 Bit3 Bit2 AA [7:0] B [3:0] C [3:0] DD [7:0] in Data stage EE [7:0] in Data stage FF [7:0] in Data stage GG [7:0] in Data stage HH [7:0] in Data stage II [7:0] in Data stage JJ [7:0] in Data stage KK [7:0] in Data stage 19 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 Bit1 Bit0 ...

Page 20

... Bit6 Bit5 AA [7:0]: The read address of Serial EEROM. USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 AA [7:0] 00h CC [7:0] Bit4 Bit3 Bit2 AA [7:0] 00h CC [7:0] Bit4 Bit3 Bit2 Reserved Bit4 Bit3 Bit2 AA [7:0] 20 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 Bit1 Bit0 Bit1 Bit0 Host_EN Bit1 Bit0 ...

Page 21

... Disabled, that is, unicast packets filtering are done without regarding multicast address list (default). SO: Start Operation. 1: Ethernet MAC start operating. 0: Ethernet MAC stop operating (default). USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 AA [7:0] 00h CC [7:0] DD [7:0] Bit4 Bit3 Bit2 AM AB SEP AMALL Reserved 21 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 Bit1 Bit0 PRO MFB [1:0] ...

Page 22

... AA [7:0] = NOID 0. BB [7:0] = NOID 1. CC [7:0] = NOID 2. DD [7:0] = NOID 3. EE [7:0] = NOID 4. FF [7:0] = NOID 5. {FF [7:0], EE [7:0], DD [7:0], CC [7:0], BB [7:0], AA [7:0]} = Ethernet MAC address [47:0] of the node. USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 AA [7:0] BB [7:0] CC [7:0] Bit4 Bit3 Bit2 AA [7:0] BB [7:0] CC [7:0] DD [7:0] EE [7:0] FF [7:0] 22 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 Bit1 Bit0 ...

Page 23

... MA 1 [7: [7: [7: [7: [7: [7: [7: CRC32 {crc31, 30, 29, 28, 27, 26} Address[5:0] = 1Ah MAR[63:0] = 400_0000h Figure 5: Multicast Filter Example Bit4 Bit3 Bit2 MM [7:6] Bit4 Bit3 Bit2 SecPhyID [4:0] PriPhyID [4:0] 23 AX88772 Bit1 Bit0 Bit1 Bit0 LDRND Bit1 Bit0 ASIX ELECTRONICS CORPORATION ...

Page 24

... RWMP: Remote Wakeup trigger by Magic Packet. 1: Enable 0: Disabled (default). US: USB Speed. 1: High speed mode speed mode. USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 RFC SBP Reserved Bit4 Bit3 Bit2 US Reserved RWMP 24 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 Bit1 Bit0 RWLU MOM ...

Page 25

... Software Reset Register (20h, write only) USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 RWMP Bit4 Bit3 Bit2 GPO_2_EN GPI_1 GPO_1_EN Bit4 Bit3 Bit2 GPO2EN GPO_1 GPO1EN 25 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 RWLU MOM Bit1 Bit0 GPI_0 GPO_0_EN Bit1 Bit0 GPO_0 GPO0EN ...

Page 26

... Automatically select based on link status of embedded 10/100 Ethernet Phy (default). 0: Manually select between the embedded 10/100 Ethernet Phy and the external one. USB to 10/100 Fast Ethernet/HomePNA Controller Bit4 Bit3 Bit2 BZ PRL PRTE Bit4 Bit3 Bit2 26 ASIX ELECTRONICS CORPORATION AX88772 Bit1 Bit0 RT RR Bit1 Bit0 ASEL PSEL ...

Page 27

... Remote Wakeup Description After AX88772 enters into suspend mode, either the USB host or AX88772 itself can awake it up and resume back to the original operation mode before it entered suspend. Following truth table shows the chip setting, wakeup event, and device response supported by this ASIC. Note that “X” stands for don’t-care. ...

Page 28

... Reset Software reset 0 = Normal operation Loopback Loopback enabled 0 = Normal operation Speed selection 100 Mb Mb/s Auto-negotiation enable Auto-negotiation enabled. Bits 8 and 13 of this register are ignored when this bit is set Auto-negotiation disabled. Bits 8 and 13 of this register 28 AX88772 Description ASIX ELECTRONICS CORPORATION ...

Page 29

... No remote fault condition detected Auto configuration ability This PHY is able to perform auto-negotiation. Link status Valid link established (100Mb/s or 10Mb/s operation Link not established Jabber detection Jabber condition detected Jabber condition detected Extended capability: 29 AX88772 Description ASIX ELECTRONICS CORPORATION ...

Page 30

... PHY 0 = 10BASE-T full-duplex not supported by this PHY 10BASE-T half-duplex support 10BASE-T half-duplex supported by this PHY 0 = 10BASE-T half-duplex not supported by this PHY Protocol selection bits: 30 AX88772 Description Description Description ASIX ELECTRONICS CORPORATION ...

Page 31

... Fault detected via the parallel detection function fault detected Link partner next page enable Link partner next page enabled 0 = Link partner not next page enabled PHY next page enable PHY not next page enabled New page reception: 31 AX88772 Description Description ASIX ELECTRONICS CORPORATION ...

Page 32

... LP_AN_AB 0, RO USB to 10/100 Fast Ethernet/HomePNA Controller 1 = New page received 0 = New page not received Link partner auto-negotiation enable Auto-negotiation supported by link partner 32 ASIX ELECTRONICS CORPORATION AX88772 ...

Page 33

... AVDDK + 0.3 - 0.5 to AVDD3 + 0.5 - 0.3 to VDD2 + 0.3 - 0.3 to 3.9 - 0.3 to VDD3 + 0.3 - 0 150 Min Typ 2.25 2.5 2.25 2.5 3.0 3.3 2.25 2.5 3.0 3.3 0 2.5 0 2.5 0 3 Condition Min No pull-up or pull-down -10 - ASIX ELECTRONICS CORPORATION AX88772 Unit ℃ Max Unit 2.75 V 2.75 V 3.6 V 2.75 V 3.6 V 2.75 V 3.6 V 3.6 V 5.25 V ℃ 115 ℃ 70 Typ Max Unit ±1 μA 10 ± ...

Page 34

... Condition Min Typ 3.3V I/O 3.0 0 LVTTL - 2.0 going LVTTL 0.8 going - |Iol| = 2~16mA - |Ioh| = 2~16mA 2 Vin = VDD3 or 0 -10 -10 Condition Operating at Ethernet 100Mbps full duplex mode and USB High speed mode 34 ASIX ELECTRONICS CORPORATION AX88772 Max Unit 2.5 2.75 V ℃ 25 115 - 0 1 1 190 KΩ ...

Page 35

... Power-up Sequence At power-up, AX88772 requires the VDD3/AVDD3 power supply to rise to nominal operating voltage within Trise3 and the VDDK/AVDD2/AVDDK power supply to rise to nominal operating voltage within Trise2. VDD3/AVDD3 VDDK/VDD2/AVDDK Symbol Parameter T 3.3V power supply rise time rise3 T 2.5V power supply rise time rise2 T 3.3V rise to 2.5V rise time delay delay32 8 ...

Page 36

... Condition Min - - - V (max (min (min (max Trst Min Typ Max 72000 - Ttclk Ttch Ttcl Tts Min - - - 28.0 5.0 36 ASIX ELECTRONICS CORPORATION AX88772 Typ Max Unit 1.0 ns Units - XIN12M clock cycle Tth Typ Max Units ...

Page 37

... MDC clock falling edge to MDIO output delay Ts MDIO data input setup time Th MDIO data input hold time USB to 10/100 Fast Ethernet/HomePNA Controller Trclk Trch Trcl Trs Min - - - 3.0 0.5 Tclk Tcl Tod Ts Th Min - - - AX88772 Trh Typ Max Units Typ Max Units 666 - ns 333 - ...

Page 38

... EEDO input setup time Th EEDO input hold time USB to 10/100 Fast Ethernet/HomePNA Controller Tclk Tch Tcl Tdv Tod VALID VALID Tscs Ts Th DATA VALID Min - - - 2666 2666 2666 0 23904 10 100 38 AX88772 Thcs Tlcs Typ Max Units 5333 - ns 2666 - ns 2666 - ...

Page 39

... Package Information pin 1 b θ Symbol θ USB to 10/100 Fast Ethernet/HomePNA Controller Millimeter Min Typ 0.05 - 1.35 1. 0.13 0.18 13.90 14.00 13.90 14.00 - 0.4 BSC 15.85 16.00 15.85 16.00 0.45 0.60 - 1.00 REF 0° 3.5° 39 ASIX ELECTRONICS CORPORATION AX88772 Max - 1.45 1.60 0.23 14.10 14.10 - 16.15 16.15 0.75 - 7° ...

Page 40

... Ordering Information AX88772 Product Name USB to 10/100 Fast Ethernet/HomePNA Controller L Package LQFP 40 ASIX ELECTRONICS CORPORATION AX88772 F Lead Free ...

Page 41

... Appendix A: System Applications Some typical applications for AX88772 are illustrated bellow. A.1 USB to Fast Ethernet Converter RJ45 MAGNETIC AX88772 A.2 USB to Fast Ethernet and/or HomeLAN Combo solution RJ45 MAGNETIC USB to 10/100 Fast Ethernet/HomePNA Controller RJ45 MAGNETIC 10/100 Ethernet PHY EEPROM USB I/F RJ11 MAGNETIC ...

Page 42

... Changed Bulk In transfer to Endpoint 2 and Bulk Out transfer to Endpoint 3 in section 5.3. Added thermal data in section 8.2. Added operating temperature in feature and section 8.1.2. Added power-up sequence in section 8.3. Changed the support to 1 USB interface in section 5.2. HsinChu, Taiwan, R.O.C. TEL: 886-3-5799500 FAX: 886-3-5799558 Email: support@asix.com.tw Web: http://www.asix.com.tw/ 42 AX88772 ...

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