AX88772_07 ASIX [ASIX Electronics Corporation], AX88772_07 Datasheet - Page 12

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AX88772_07

Manufacturer Part Number
AX88772_07
Description
USB to 10/100 Fast Ethernet/HomePNA Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
3.9 MAC to MAC Connection via MII Interface
Below figure shows recommended MAC-to-MAC connection for AX88772 MII Interfacing with an external Ethernet
MAC device. When operating at this mode, the Ethernet MAC on both sides should be set to operate at 100M full-duplex
mode.
The U1 & R1 are reserved for adjusting RXDV/RXD[3:0] input setup/hold time with respect to AX88772 RX_CLK
clock phase. Either R2 or R1 is installed at a time. User should check the TX_CLK, TXD[3:0], TXEN output timing of
external Ethernet MAC device vs. AX88772’s RXDV/RXD[3:0] input setup/hold time.
The U2 & R3 are reserved for adjusting RXDV/RXD[3:0] input setup/hold time with respect to RX_CLK clock phase on
external Ethernet MAC device. Either R3 or R4 is installed at a time. User should check the TX_CLK, TXD[3:0], TXEN
output timing of AX88772 vs. the RXDV/RXD[3:0] setup/hold time of external Ethernet MAC device.
3.3V
0.1μF
AX88772
L3
SBK160808T-110Y-S
11 ohm@100MHz
RX_CLK
TX_CLK
MDINT
RXDV
TXEN
MDIO
RXER
TXER
RXD3
RXD2
RXD1
RXD0
TXD3
TXD2
TXD1
TXD0
MDC
COL
CRS
0.1μF
47KΩ
R1 0Ω
4.7KΩ
R2 0Ω
25MHz-OSC
VCC GND
3.3V
USB to 10/100 Fast Ethernet/HomePNA Controller
OUT
U1
12
R5
22Ω
U2
R4 0Ω
R3 0Ω
3.3V
ASIX ELECTRONICS CORPORATION
4.7KΩ
47KΩ
TX_CLK
TXD3
TXD2
TXD1
TXD0
TXEN
TXER
RX_CLK
RXD3
RXD2
RXD1
RXD0
RXDV
CRS
COL
RXER
MDC
MDIO
GPIO
Ethernet MAC
10/100M
AX88772

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