AX88780_07 ASIX [ASIX Electronics Corporation], AX88780_07 Datasheet - Page 25

• Manufacturer Part Number: AX88780_07
• Description: High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

4:1
0
4.17 MAC_CFG2--MAC Configuration2 Register
Offset Address = 0xFC48
15:8
7:2
1:0
4.18 MAC_CFG3--MAC Configuration3 Register
Offset Address = 0xFC4C
Field
15
13:7
6:0
4.19 TXPAUT--TX Pause Time Register
Offset Address= 0xFC54
Field
31:23
22:0
4.20 RXBTHD0--RX buffer Threshold0 Register
Offset Address= 0xFC58
Field
31:11
10:0
Field
Name
NOABORT
IPGR1
IPGR2
JamLT
Name
TXPVAL R/W
Name
RXLOWB
Name
-
-
-
-
-
-
R/W
R/W
R/W
Type
Type
R
Type
R/W
R/W
R/W
Type
R
R/W
R/W
R/W
0x01
000000
00
Default
Default
0x1F_E000
Default
0
0001100
0001110
Default
All 0’s
0x300
0000
0
Reserved, keep this field in default value for normal operation.
Reserved, must set to ‘00’ for normal operation
Define Jam Limit for backpressure collision account.
Normally set this field at 0x19. It can avoid HUB port going to partition state due to
too many collisions. AX88780 will skip one frame collision backpressure when
collision counter equal to JamLT. The collision count will be reset to zero when
every transmit frame with no collision or receive a frame with no backpressure
collision.
Inter-Frame Gap segment1
Inter-Frame Gap segment2
Description
No Abort
When this bit is enabled, MAC will keep retry transmit current frame even
excessive collision otherwise it will abort current transmission due to
excessive collision.
1 = enable
0 = disable
Default = 0x001F_E000
Default = 0x0000_0300
Default = 0x0000_0100
Default = 0x0000_060E
until the waiting time is expired.
1 = enable
0 = disable
Reserved, must set to ‘0s’ for normal operation
Reserved, must set to ‘0s’ for normal operation
Reserved
TX Pause Time out
It is used to re-transmit a pause-on frame when pause timer expired and
receive buffer still not enough.
In 32-bit mode, this field should be set to 0x7F_8000.
In 16-bit mode, this field should be set to 0xFFFF at 10/100Mbps modes.
(Note: The bit 16 ~ 22 of this field are invalid in 16-bit mode.)
Reserved
RX Remainder Capacity Low-Bound
This field defines as the remainder capacity of RX buffer for pause
operation. If the flow control (bit12 of MACCFG0) is enabled, MAC will
send pause frame when the available space of receive buffer is less than
this value. The unit is 16-byte.
25
Description
ASIX ELECTRONICS CORPORATION
Description
Description
AX88780