ADC-HS12BMC-C Murata, ADC-HS12BMC-C Datasheet
ADC-HS12BMC-C
Related parts for ADC-HS12BMC-C
ADC-HS12BMC-C Summary of contents
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... Parallel output PRODUCT OVERVIEW The ADC-HS12B is a high performance 12-bit hybrid AID converter with a self-contained sample-hold specifi cally designed for systems applica- tions where the sample-hold is an integral part of the conversion process. The internal sample-hold has a 6 microseconds acquisition time for a full 10V dc input change ...
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... The adjustment range is ±0.5% of FSR for zero or offset and ±0.3% for gain. The trimming pots should be located as close as possible to the converter to avoid noise pickup. Calibration of the ADC-HS12B is performed with the sample-hold connected and operating dynamically. This results in adjusting out the sample-hold errors along with the A/D converter. For slow throughput applications it is recommended that a 0.01 μ ...
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... Mar 2011 MDA_ADCHS-12B.B02 Page LSB ...
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... CALIBRATION PROCEDURE 1. Connect the ADC-HS12B as shown in one of the connection diagrams. The sample-hold and AID converter should be timed as shown in the timing diagram. The trigger pulse should be applied at a rate of 70 kHz or less and should be 100 nanoseconds minimum width. 2. Zero and Offset Adjustments Apply a precision voltage reference source between the selected analog input and ground ...