ATMEGA8-16AU SL383 Atmel, ATMEGA8-16AU SL383 Datasheet
ATMEGA8-16AU SL383
Related parts for ATMEGA8-16AU SL383
ATMEGA8-16AU SL383 Summary of contents
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... PDIP, 32-lead TQFP, and 32-pad QFN/MLF • Operating Voltages – 2.7 - 5.5V (ATmega8L) – 4.5 - 5.5V (ATmega8) • Speed Grades – MHz (ATmega8L) – MHz (ATmega8) • Power Consumption at 4 Mhz, 3V, 25°C – Active: 3.6 mA – Idle Mode: 1.0 mA – Power-down Mode: 0.5 µA ® 8-bit Microcontroller ...
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... Pin Configurations ATmega8(L) 2 PDIP (RESET) PC6 1 28 PC5 (ADC5/SCL) (RXD) PD0 2 27 PC4 (ADC4/SDA) (TXD) PD1 3 26 PC3 (ADC3) (INT0) PD2 4 25 PC2 (ADC2) (INT1) PD3 5 24 PC1 (ADC1) (XCK/T0) PD4 6 23 PC0 (ADC0) VCC 7 22 GND GND 8 21 AREF (XTAL1/TOSC1) PB6 ...
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... Overview The ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8 achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption ver- sus processing speed. Block Diagram Figure 1 ...
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... RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega8 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications. The ATmega8 AVR is supported with a full suite of program and system development tools, including C compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators, and evaluation kits. ...
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... As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega8 as listed on 63. RESET Reset input ...
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... In the TQFP and QFN/MLF package, ADC7..6 serve as analog inputs to the A/D converter. QFN/MLF Package These pins are powered from the analog supply and serve as 10-bit ADC channels. Only) ATmega8( even if the ADC is not used. If the ADC is used, it should be con- CC through a low-pass filter. Note that Port C (5..4) use digital supply voltage ...
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... A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 2486VS–AVR–05/09 1. ATmega8(L) 7 ...
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... ACSR ACD 0x07 (0x27) ADMUX REFS1 0x06 (0x26) ADCSRA ADEN 0x05 (0x25) ADCH 0x04 (0x24) ADCL 0x03 (0x23) TWDR 0x02 (0x22) TWAR TWA6 ATmega8(L) 8 Bit 6 Bit 5 Bit 4 Bit – – – – SP6 SP5 SP4 SP3 INT0 – ...
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... I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 2486VS–AVR–05/09 Bit 6 Bit 5 Bit 4 Bit 3 TWS6 TWS5 TWS4 TWS3 Two-wire Serial Interface Bit Rate Register ATmega8(L) Bit 2 Bit 1 Bit 0 TWPS1 TWPS0 – Page 173 171 9 ...
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... BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared Mnemonics Operands ATmega8(L) 10 Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← Rd • ← ...
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... C ← ← ← ← ← ← ← ← ← ← ← ← ← 1 Description ATmega8(L) None None None None None None None None None None None None None None ...
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... SEH Set Half Carry Flag in SREG CLH Clear Half Carry Flag in SREG MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset ATmega8( ← ← ← None (see specific descr. for Sleep function) None (see specific descr. for WDR/timer) ...
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... Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2486VS–AVR–05/09 Ordering Code Package (2) ATmega8L-8AU 32A 28P3 (2) ATmega8L-8PU 32M1-A (2) ATmega8L-8MU (2) ATmega8-16AU 32A (2) ATmega8-16PU 28P3 (2) ATmega8-16MU 32M1-A Package Type ATmega8(L) (1) Operation Range Industrial ° ° (- Industrial ° ° (- ...
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... This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R ATmega8( PIN 1 IDENTIFIER ...
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... San Jose, CA 95131 R 2486VS–AVR–05/09 D PIN PLACES 0º ~ 15º REF eB TITLE 28P3, 28-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) ATmega8(L) E1 COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 4.5724 A1 0.508 – – D 34.544 – ...
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... Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 R ATmega8( TITLE 32M1-A, 32-pad 1.0 mm Body, Lead Pitch 0.50 mm, 3 ...
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... Problem Fix / Workaround Use external capacitors in the range XTAL1/TOSC1 and XTAL2/TOSC2. This will be fixed in ATmega8 Rev. G where the CKOPT Fuse will control internal capacitors also when internal RC Oscillator is selected as main clock source. For ATmega8 Rev. G, CKOPT = 0 (programmed) will enable the internal capacitors on XTAL1 and XTAL2. Cus- tomers who want compatibility between Rev ...
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... Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request. Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg- ister triggers an unexpected EEPROM interrupt request. Problem Fix / Workaround Always use OUT or SBI to set EERE in EECR. ATmega8(L) 18 2486VS–AVR–05/09 ...
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... Oscillator” on page “Fast PWM Mode” on page 89. “USART Initialization” on page Table 37 on page 97, Table 39 on page 118, and Table 98 on page 240. “Errata” on page 17. ATmega8(L) with typical values 292. 1. “DC Characteristics” on 32. 138. 98, Table 42 on page ...
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... Changes from Rev. 1. Removed “Preliminary” and TBDs from the datasheet. 2486K-08/ Renamed ICP to ICP1 in the datasheet. Rev. 2486L-10/03 3. Removed instructions CALL and JMP from the datasheet. ATmega8(L) 20 “Resources” on page 7. “External Clock” on page 32. “Serial Peripheral Interface – SPI” on page “ ...
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... Table 15 on page BOT “ADC Characteristics” on page “ATmega8 Typical Characteristics” on page “Errata” on page 17. “Asynchronous Timer Clock – clkASY” on page Figure 38 on page “Filling the Temporary Buffer (Page Loading)” on page 216 “EEPROM Write during Power-down Sleep Mode” on page “ ...
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... Corrected Errors in Cross References. Changes from Rev. 1. Updated Some Preliminary Test Limits and Characterization Data 2486D-03/02 to The following tables have been updated: Rev. 2486E-06/02 ATmega8(L) 22 “Alternate Functions of Port C” on page “Alternate Functions of Port B” on page 113. “Performing a Page Write” on page Table 87 on page “ ...
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... DC Characteristics on 248. “External Clock” on page Table 99, “External Clock Drive,” on page 173. “ATmega8 Typical Characteristics” on page “Bit Rate Generator Unit” on page “Address Match Unit” on page “Oscillator Calibration Register – OSCCAL” on page 31 225. 26, ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...