DM74LS257BN Fairchild Semiconductor, DM74LS257BN Datasheet

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DM74LS257BN

Manufacturer Part Number
DM74LS257BN
Description
IC SELECTOR/MUX QUAD 2INP 16-DIP
Manufacturer
Fairchild Semiconductor
Series
74LSr
Type
Data Selector/Multiplexerr
Datasheet

Specifications of DM74LS257BN

Circuit
4 x 2:1
Independent Circuits
1
Current - Output High, Low
2.6mA, 24mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LS257
74LS257BN
74LS257N
DM74LS257N

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Quantity
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DM74LS257BN
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Quantity:
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© 1999 Fairchild Semiconductor Corporation
DM74LS257BM
DM74LS257BN
DM74LS257B
3-STATE Quad 2-Data Selectors/Multiplexers
General Description
These Schottky-clamped high-performance multiplexers
feature 3-STATE outputs that can interface directly with
data lines of bus-organized systems. With all but one of the
common outputs disabled (at a high impedance state), the
low impedance of the single enabled output will drive the
bus line to a HIGH or LOW logic level. To minimize the pos-
sibility that two outputs will attempt to take a common bus
to opposite logic levels, the output enable circuitry is
designed such that the output disable times are shorter
than the output enable times.
This 3-STATE output feature means that n-bit (paralleled)
data selectors with up to 258 sources can be implemented
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
H
L
Order Number
LOW Level
HIGH Level
Control
Output
H
L
L
L
L
Package Number
Select
Z
Inputs
X
X
H
H
L
L
High Impedance (off)
Don’t Care
M16A
N16E
A
H
X
L
X
X
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
B
H
X
X
X
L
Output Y
LS257
DS006417
H
H
Z
L
L
for data buses. It also permits the use of standard TTL reg-
isters for data retention throughout the system.
Features
Logic Diagram
3-STATE versions LS157 and LS158 with same pinouts
Schottky-clamped for significant improvement in A-C
performance
Provides bus interface from multiple sources in
high-performance systems
Average propagation delay from data input 12 ns
Typical power dissipation: 50 mW
Package Description
June 1989
Revised November 1999
www.fairchildsemi.com

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DM74LS257BN Summary of contents

Page 1

... Package Number DM74LS257BM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS257BN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...

Page 3

Switching Characteristics V 5V and Symbol Parameter t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow www.fairchildsemi.com Package Number M16A 4 ...

Page 5

Physical Dimensions Physical Dimensions inches (millimeters) unless otherwise noted (Continued) inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent ...

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