DM74S253N Fairchild Semiconductor, DM74S253N Datasheet
DM74S253N
Manufacturer Part Number
DM74S253N
Description
IC SELECTOR/MUX DL 1-4LINE 16DIP
Manufacturer
Fairchild Semiconductor
Series
74Sr
Type
Data Selector/Multiplexerr
Datasheet
1.DM74S253N.pdf
(4 pages)
Specifications of DM74S253N
Circuit
2 x 4:1
Independent Circuits
1
Current - Output High, Low
6.5mA, 20mA
Voltage Supply Source
Single Supply
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74S253
74S253N
74S253N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DM74S253N
Manufacturer:
SST
Quantity:
540
Part Number:
DM74S253N
Manufacturer:
NS/国半
Quantity:
20 000
© 2000 Fairchild Semiconductor Corporation
DM74S253N
DM74S253
Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer
General Description
Each of these Schottky-clamped data selectors/multiplex-
ers contains inverters and drivers to supply fully comple-
mentary, on-chip, binary decoding data selection to the
AND-OR gates. Separate output control inputs are pro-
vided for each of the two four-line sections.
The 3-STATE outputs can interface directly with data lines
of bus-organized systems. With all but one of the common
outputs disabled (at a high impedance state), the low
impedance of the single enable output will drive the bus
line to a HIGH or LOW logic level.
Ordering Code:
Connection Diagram
Order Number
Package Number
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS006481
Features
Function Table
Address inputs A and B are common to both sections.
H
L
X
Z
B
X
H
H
H
H
L
L
L
L
3-STATE version of S153 with same pin-out
Schottky-diode-clamped transistors
Permits multiplexing from N lines to 1 line
Performs parallel-T-serial conversion
Strobe/output control
High fan-out totem-pole outputs
Typical propagation delay
Typical power dissipation 275 mW
Select
Inputs
LOW Level
Don’t Care
High Impedance
HIGH Level
From data to output
From select to output
Package Description
A
X
H
H
H
H
L
L
L
L
C0
X
H
X
X
X
X
X
X
L
Data Inputs
C1
X
X
X
H
X
X
X
X
L
C2
X
X
X
X
X
H
X
X
L
12 ns
6 ns
August 1986
Revised May 2000
C3
X
X
X
X
X
X
X
H
L
www.fairchildsemi.com
Control
Output
G
H
L
L
L
L
L
L
L
L
Output
H
H
H
H
Y
Z
L
L
L
L
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Datasheet:
DM74S253N Summary of contents
Page 1
... HIGH or LOW logic level. Ordering Code: Order Number Package Number DM74S253N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram © 2000 Fairchild Semiconductor Corporation Features ...
Page 2
Logic Diagram www.fairchildsemi.com 2 ...
Page 3
Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...
Page 4
Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...