P89LPC936FDH-S Philips, P89LPC936FDH-S Datasheet
P89LPC936FDH-S
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P89LPC936FDH-S Summary of contents
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P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/ byte-erasable flash with 8-bit ADCs Rev. 06 — 20 June 2005 1. General description The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost packages, based ...
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... Eight keypad interrupt inputs, plus two additional external interrupt inputs. Schmitt trigger port inputs. Second data pointer. Emulation support. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Ordering options Table 3: Type number P89LPC933FDH P89LPC935FA P89LPC934FDH P89LPC935FDH P89LPC935FHN P89LPC936FDH 9397 750 15113 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core highlights the differences between the four devices. For a complete list of device Section 2 “Features”. Product comparison overview ...
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... CIN1B OCA OCB CCU (CAPTURE/ OCC COMPARE UNIT) OCD (P89LPC935/936) ICA ICB AD10 AD11 ADC1/DAC1 AD12 AD13 DAC1 AD00 AD01 ADC0/DAC0 AD02 (P89LPC935/936) AD03 DAC1 POWER MONITOR (POWER-ON RESET, BROWNOUT RESET) 002aab070 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... P89LPC934FDH 9 P3.0/XTAL2/CLKOUT 10 P1.4/INT1 P1.3/INT0/SDA 11 12 P1.2/T0/SCL 13 P2.2/MOSI P2.3/MISO 14 P2.0/ICB/DAC0/AD03 1 P2.1/OCD/AD02 2 3 P0.0/CMP2/KBI0/AD01 4 P1.7/OCC/AD00 P1.6/OCB 5 P1.5/RST P89LPC935FDH P3.1/XTAL1 8 P89LPC936FDH P3.0/XTAL2/CLKOUT 9 10 P1.4/INT1 11 P1.3/INT0/SDA P1.2/T0/SCL 12 13 P2.2/MOSI 14 P2.3/MISO Rev. 06 — 20 June 2005 28 P2.7 27 P2.6 26 P0.1/CIN2B/KBI1/AD10 25 P0.2/CIN2A/KBI2/AD11 24 P0.3/CIN1B/KBI3/AD12 23 P0.4/CIN1A/KBI4/DAC1/AD13 22 P0.5/CMPREF/KBI5 P0.6/CMP1/KBI6 19 P0 ...
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... P1.5/RST P89LPC935FHN 4 P3.1/XTAL1 5 P3.0/XTAL2/CLKOUT 6 P1.4/INT1 7 P1.3/INT0/SDA Transparent top view Rev. 06 — 20 June 2005 25 P0.2/CIN2A/KBI2/AD11 24 P0.3/CIN1B/KBI3/AD12 23 P0.4/CIN1A/KBI4/DAC1/AD13 22 P0.5/CMPREF/KBI5 P0.6/CMP1/KBI6 19 P0.7/T1/KBI7 002aab074 21 P0.2/CIN2A/KBI2/AD11 20 P0.3/CIN1B/KBI3/AD12 19 P0.4/CIN1A/KBI4/DAC1/AD13 18 P0.5/CMPREF/KBI5 P0.6/CMP1/KBI6 15 P0.7/T1/KBI7 002aab076 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... CMP1 — Comparator 1 output. I KBI6 — Keyboard input 6. I/O P0.7 — Port 0 bit 7. I/O T1 — Timer/counter 1 external count input or overflow output. I KBI7 — Keyboard input 7. Rev. 06 — 20 June 2005 Section 8.13.1 “Port configurations” for details. © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... P1.7 — Port 1 bit 7. O OCC — Output Compare C. (P89LPC935/936) I AD00 — ADC0 channel 0 analog input. (P89LPC935/936) Rev. 06 — 20 June 2005 Section 8.13.1 “Port for details. P1.2 and will fall below the minimum specified DD © Koninklijke Philips Electronics N.V. 2005. All rights reserved. falls below the ...
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... I/O P2.6 — Port 2 bit 6. O OCA — Output Compare A. (P89LPC935/936) I/O P2.7 — Port 2 bit 7. I ICA — Input Capture A. (P89LPC935/936) Rev. 06 — 20 June 2005 Section 8.13.1 “Port configurations” for details. © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... XTAL1/XTAL2 are not used to generate the clock for the RTC/system timer. I Ground reference. I Power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Rev. 06 — 20 June 2005 Section 8.13.1 “Port configurations” for details. © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... DAC0 MOSI MISO PORT 2 SS SPICLK 002aab077 SS TXD RXD SCL T0 SDA INT0 PORT 1 INT1 RST OCB AD00 OCC ICB AD03 AD02 OCD MOSI MISO PORT 2 SS SPICLK OCA ICA © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SCL SDA DAC0 ...
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... Logic 0 must be written with logic 0, and will return a logic 0 when read. – Logic 1 must be written with logic 1, and will return a logic 1 when read. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON0 A/D control register 0 8EH ADCON1 A/D control register 1 97H ADINS A/D input select A3H ...
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Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. FMCON Program flash control (Read) E4H Program flash control (Write) E4H FMDATA Program flash data E5H 2 I2ADR I C slave address ...
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Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. KBMASK Keypad interrupt mask 86H register KBPATN Keypad pattern register 93H Bit address P0* Port 0 80H Bit address P1* Port 1 ...
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Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. SADDR Serial port address register A9H SADEN Serial port address enable B9H SBUF Serial Port data buffer register 99H Bit address SCON* ...
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Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. WDL Watchdog load C1H WFEED1 Watchdog feed 1 C2H WFEED2 Watchdog feed 2 C3H [1] Unimplemented bits in SFRs (labeled ’-’) are ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON0 A/D control register 0 8EH ADCON1 A/D control register 1 97H ADINS A/D input select A3H ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. CCCRB Capture compare B control EBH register CCCRC Capture compare C control ECH register CCCRD Capture compare D control EDH register CMP1 ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. I2SCLL Serial clock generator/SCL DCH duty cycle register low 2 I2STAT I C status register D9H ICRAH Input capture A register high ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. OCRCH Output compare C register FDH high OCRCL Output compare C register FCH low OCRDH Output compare D register FFH high OCRDL ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. RSTSRC Reset source register DFH RTCCON Real-time clock control D1H RTCH Real-time clock register high D2H RTCL Real-time clock register low D3H ...
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Table 6: Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. TL2 CCU timer low CCH TMOD Timer 0 and 1 mode 89H TOR2H CCU reload register high CFH TOR2L CCU reload register ...
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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Figure 8) and can also be optionally divided to a slower frequency (see register”). is defined as the OSCCLK frequency. osc Rev. 06 — 20 June 2005 CCLK . 2 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... CCLK. If the clock output is not needed 2 falls below the minimum specified operating voltage. DD Rev. 06 — 20 June 2005 room has reached its DD will fall below the minimum DD © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... LOW FREQUENCY OSCCLK RCCLK RC OSCILLATOR WATCHDOG OSCILLATOR TIMER 0 AND 2 I C-BUS TIMER 1 Rev. 06 — 20 June 2005 (P89LPC935/936) CCLK DIVM 2 PCLK PCLK SPI UART (P89LPC935/936) © Koninklijke Philips Electronics N.V. 2005. All rights reserved. RTC ADC1 ADC0 CPU WDT 32 PLL CCU 002aab079 ...
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... MOVX instruction using the SPTR, R0, or R1. All or part of this space could be implemented on-chip. The P89LPC935/936 has 512 bytes of on-chip XDATA memory. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Auxiliary (‘External Data’) on-chip memory that is accessed using the MOVX instructions (P89LPC935/936) 2 C-bus, keyboard, comparators 1 and 2, SPI, CCU, data Rev. 06 — 20 June 2005 (P89LPC935/936)”). Table 7. © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Size (bytes) 128 256 512 ...
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... BOF EBO KBIF EKBI EWDRT CMF2 CMF1 EC EA (IE0.7) TF0 ET0 TF1 ET1 TI & RI/RI ES/ESR TI EST SI EI2C SPIF ESPI (1) ECCU Rev. 06 — 20 June 2005 for details. wake-up (if in power-down) interrupt to CPU 002aab081 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... External RST pin supported No external reset (except during power-up) External RST pin supported , causing extra power consumption. Therefore, applying Rev. 06 — 20 June 2005 P89LPC933/934/935/936 [1] [1] © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Table 8. Number of I/O pins (28-pin package ...
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... This is accomplished with two hardware functions: Power-on detect and brownout detect. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Table 11 “Static characteristics” Rev. 06 — 20 June 2005 for detailed © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... This retains the RAM contents at the point where Power-down mode was RAM Rev. 06 — 20 June 2005 DD characteristics”), and is negated when V rise and fall times must be observed. DD for specifications. has been lowered © Koninklijke Philips Electronics N.V. 2005. All rights reserved. falls below the DD , therefore RAM must ...
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... ISP mode during power-on (see P89LPC933/934/935/936 User manual ). Otherwise, instructions will be fetched from address 0000H. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... CPU clock (CCLK) or the XTAL oscillator, provided that the XTAL oscillator is not 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... The capture event can be programmed to be either rising or falling edge triggered. A simple noise filter can be enabled on the input capture by enabling the Input 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core TOR2 compare value timer value 0x0000 non-inverted inverted TOR2 compare value timer value 0 non-inverted inverted Rev. 06 — 20 June 2005 002aaa893 002aaa894 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... PCLK = ----------------- - Rev. 06 — 20 June 2005 TOR2 COMPARE VALUE A (or C) COMPARE VALUE B (or D) TIMER VALUE 0 PWM OUTPUT A (or C) (P2.6) PWM OUTPUT B (or D) (P1.6) 002aaa895 Equation 1. PCLK © Koninklijke Philips Electronics N.V. 2005. All rights reserved ( ...
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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core other interrupt sources PRIORITY ENCODER clock . 16 Rev. 06 — 20 June 2005 interrupt to CPU ENCINT.0 ENCINT.1 ENCINT.2 002aaa896 1 of the CPU clock 16 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Rev. 06 — 20 June 2005 Section 8.20.5 “Baud the CPU clock 16 32 data bit, and a stop bit (logic 1). In fact, Mode 3 is selection”). SBRGS = 0 baud rate modes 1 and 3 SBRGS = 1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Figure 14). Note 002aaa897 ...
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... If double buffering is enabled, TB8 must be updated before SBUF is written, as TB8 will be double-buffered together with SBUF data. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core bit (bit 8) in double buffering (modes 1, 2 and 3) Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... C-bus interface that supports data transfers C-bus P1.3/SDA P1.2/SCL P89LPC935 2 C-bus configuration Rev. 06 — 20 June 2005 Figure 15. The P89LPC933/934/935/936 OTHER DEVICE OTHER DEVICE 2 2 WITH I C-BUS WITH I C-BUS INTERFACE INTERFACE 002aab082 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SDA SCL ...
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... COMPARATOR SHIFT REGISTER ACK I2DAT 8 BIT COUNTER / ARBITRATION & CCLK TIMING SYNC LOGIC AND CONTROL LOGIC SERIAL CLOCK interrupt GENERATOR CONTROL REGISTERS & SCL DUTY CYCLE REGISTERS 8 STATUS DECODER STATUS REGISTER 8 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. 002aaa899 ...
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... READ DATA BUFFER CLOCK LOGIC MSTR SPEN SPI CONTROL REGISTER SPI internal data bus Figure 18 Rev. 06 — 20 June 2005 PIN CONTROL LOGIC clock S M through Figure 20. © Koninklijke Philips Electronics N.V. 2005. All rights reserved. MISO P2.3 MOSI P2.2 SPICLK P2.5 SS P2.4 002aaa900 ...
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... MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS GENERATOR Rev. 06 — 20 June 2005 slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS 002aaa901 slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS GENERATOR 002aaa902 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK port GENERATOR port Rev. 06 — 20 June 2005 slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS 002aaa903 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... V. DD CP1 comparator 1 OE1 CO1 change detect CN1 change detect CP2 comparator 2 CO2 OE2 CN2 10 %. Rev. 06 — 20 June 2005 Figure 21. The comparators CMP1 (P0.6) CMF1 interrupt EC CMF2 CMP2 (P0.0) 002aaa904 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... In order to set the flag and cause an interrupt, the pattern on Port 0 must be held longer than six CCLKs. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Figure 22 shows the watchdog timer in Watchdog mode. PRESCALER SHADOW REGISTER PRE2 PRE1 PRE0 - Rev. 06 — 20 June 2005 WDL (C1H) 8-BIT DOWN reset COUNTER - WDRUN WDTOF WDCLK 002aaa905 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ( ...
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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core DD Rev. 06 — 20 June 2005 as the supply voltage to perform © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... IAP is performed in the application under the control of the microcontroller’s firmware. The IAP facility consists of internal hardware resources to facilitate programming and erasing. The Philips IAP has made IAP in an embedded application possible without additional components. Two methods are available to accomplish IAP. A set of predefined IAP functions are provided in a boot ROM and can be called through a common interface, PGM_MTP ...
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... P89LPC933/934/935/936 through the serial port. This firmware is provided by Philips and embedded within each P89LPC933/934/935/936 device. The Philips ISP facility has made ISP in an embedded application possible with a minimum of additional expense in components and circuit board area. The ISP function uses fi ...
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... Dual channel, continuous conversion mode. Single step mode. Four conversion start modes: Timer triggered start. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 Figure 23. Each A/D © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core comp + INPUT MUX – comp + INPUT MUX – Rev. 06 — 20 June 2005 SAR 8 DAC1 CONTROL LOGIC SAR 8 DAC0 CCLK 002aab080 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Start immediately Programming this mode immediately starts a conversion.This start mode is available in all A/D operating modes. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... In Power-down mode or Total Power-down mode, the A/D does not function. If the A/D is enabled, it will consume power. Power can be reduced by disabling the A/D. 9397 750 15113 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Conditions ) with respect based on package heat transfer, not device power consumption Rev. 06 — 20 June 2005 Min Max Unit 55 +125 C 65 +150 100 1.5 W unless SS © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... DD DD 0 0.6V 0. 0. 0.6 1.0 - 0.2 0.3 V 0 0 3.2 - 0.5 - +4.0 0 450 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Unit mV ...
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... exceeds the test condition 2.6 V; push-pull mode amb DD © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Max Unit 30 k 2. ppm may OL OH 002aab099 ...
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... CHCX 1333 - - 1083 - 103 cy(CLK 150 - CCLK 0 2.0 6 CCLK - 3 500 - - 333 - - 250 - - 250 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. kHz MHz ns MHz MHz MHz ...
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... Rev. 06 — 20 June 2005 MHz Unit osc Max Min Max - 165 - ns - 250 - ns - 165 - ns - 250 - ns - 100 - ns - 100 - ns 120 0 120 ns 240 - 240 ns 240 - 240 ns 167 - 167 100 - 100 ns 2000 - 2000 ns 100 - 100 ns 2000 - 2000 ns © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... CLCX cy(CLK) CHCX 888 - - 722 - cy(CLK 150 - CCLK 0 3.0 6 CCLK - 4 333 - - 222 - - 250 - - 250 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. kHz MHz ns MHz MHz MHz ...
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... Rev. 06 — 20 June 2005 MHz Unit osc Max Min Max - 111 - ns - 167 - ns - 111 - ns - 167 - ns - 100 - ns - 100 - 160 - 160 ns 160 - 160 ns 111 - 111 100 - 100 ns 2000 - 2000 ns 100 - 100 ns 2000 - 2000 ns © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... SPIDSU SPIDH MSB/LSB SPIDV SPIOH master MSB/LSB out Rev. 06 — 20 June 2005 set TI valid valid valid valid set RI 002aaa906 t SPIR LSB/MSB SPIDV SPIR master LSB/MSB out 002aaa908 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... SPICLKH t SPIF t SPICLKL t SPICLKH t t SPIDSU SPIDH MSB/LSB SPIDV SPIOH master MSB/LSB out Rev. 06 — 20 June 2005 t CHCX t CLCH T cy(CLK) 002aaa907 t SPIR LSB/MSB in t SPIDV t SPIDV t SPIR master LSB/MSB out 002aaa909 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Rev. 06 — 20 June 2005 t SPIR t SPILAG t SPIOH slave LSB/MSB out not defined t t SPIDSU SPIDH LSB/MSB in 002aaa910 t SPIR t SPILAG t SPIOH t t SPIDV slave LSB/MSB out SPIDSU SPIDSU SPIDH LSB/MSB in 002aaa911 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. t SPIDIS SPIDIS ...
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... RH RST t RL Conditions 0 < V < Rev. 06 — 20 June 2005 Min Typ Max 002aaa912 Min Typ Max - - 0 250 500 - - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Unit Unit ...
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... Conditions Min kHz to 100 kHz - - 111 A/D enabled - Rev. 06 — 20 June 2005 Typ Max Unit 0 0 LSB - 1 LSB - 2 LSB - LSB - 1 LSB - 100 V/ms - 2000 ns - 13T ns cy(ADC) © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... detail 12.57 1.22 1.44 0.18 0.18 0.1 12.32 1.07 1.02 0.495 0.048 0.057 0.007 0.007 0.004 0.485 0.042 0.040 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT261 (1) ( max. max. 2.16 2. 0.085 0.085 ISSUE DATE 99-12-27 01-11- ...
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... JEITA MO-153 Rev. 06 — 20 June 2005 P89LPC933/934/935/936 detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT361 ( 0.8 8 0.1 o 0.5 0 ISSUE DATE 99-12-27 03-02- ...
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... 6.1 4.25 6.1 4.25 0.65 3.9 3.9 5.9 3.95 5.9 3.95 REFERENCES JEDEC JEITA MO-220 - - - Rev. 06 — 20 June 2005 P89LPC933/934/935/936 detail 0.75 0.05 0.1 0.1 0.05 0.50 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT788 ISSUE DATE 02-10- ...
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... Electrically Erasable Programmable Read-Only Memory Electro-Magnetic Interference Light Emitting Diode Pulse Width Modulator Random Access Memory Resistance-Capacitance Real-Time Clock Successive Approximation Register Special Function Register Serial Peripheral Interface Universal Asynchronous Receiver/Transmitter Rev. 06 — 20 June 2005 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Change notice Product data sheet - Product data sheet - Objective data - Rev. 06 — 20 June 2005 Doc. number Supersedes 9397 750 15113 P89LPC933_934_ 935_936_5 9397 750 14035 P89LPC933_934_ 935-04 9397 750 12853 P89LPC933_934_ 935-03 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. ...
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... Internal reference voltage 8.23.2 Comparator interrupt . . . . . . . . . . . . . . . . . . . 47 8.23.3 Comparators and power reduction modes . . . 47 8.24 Keypad interrupt . . . . . . . . . . . . . . . . . . . . . . . 47 8.25 Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 48 8.26 Additional features . . . . . . . . . . . . . . . . . . . . . 48 8.26.1 Software reset . . . . . . . . . . . . . . . . . . . . . . . . 48 8.26.2 Dual data pointers . . . . . . . . . . . . . . . . . . . . . 48 8.27 Data EEPROM (P89LPC935/936 8.28 Flash program memory . . . . . . . . . . . . . . . . . 49 Rev. 06 — 20 June 2005 continued >> © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice ...