SN74LVCZ161284AGR Texas Instruments, SN74LVCZ161284AGR Datasheet

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Specifications of SN74LVCZ161284AGR
Logic Type	IEEE STD 1284 Translation Transceiver	Supply Voltage	3 V ~ 3.6 V
Number Of Bits	19	Operating Temperature	0°C ~ 70°C
Mounting Type	Surface Mount	Package / Case	48-TSSOP
Lead Free Status / RoHS Status	Lead free / RoHS Compliant	Other names	296-12025-2

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SN74LVCZ161284A

19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER

WITH ERROR-FREE POWER UP

SCES358B – SEPTEMBER 2001 – REVISED MAY 2005

DESCRIPTION/ORDERING INFORMATION (CONTINUED)

The power-on reset (POR) ensures that the Y outputs (Y9–Y13) stay in the high state after power on until an

associated input (A9–A13) goes high. When an associated input goes high, all Y outputs are activated, and

noninverting signals of the associated inputs are driven through Y outputs. This special feature prevents printer

system errors caused by deasserting the BUSY signal in the cable at power on.

INPUTS

OUTPUT

DIR

Open drain

A9–A13 to Y9–Y13 and PERI LOGIC IN to PERI LOGIC OUT

Totem pole

B1–B8 to A1–A8 and C14–C17 to A14–A17

Totem pole

B1–B8 to A1–A8, A9–A13 to Y9–Y13, PERI LOGIC IN to PERI LOGIC OUT, and C14–C17 to A14–A17

Open drain

A1–A8 to B1–B8, A9–A13 to Y9–Y13, and PERI LOGIC IN to PERI LOGIC OUT

Totem pole

C14–C17 to A14–A17

Totem pole

A1–A8 to B1–B8, A9–A13 to Y9–Y13, C14–C17 to A14–A17, and PERI LOGIC IN to PERI LOGIC OUT

FUNCTION TABLE

MODE

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SN74LVCZ161284AGR