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SN74LVCZ161284AGR
SN74LVCZ161284AGR | |
|---|---|
| Manufacturer Part Number | SN74LVCZ161284AGR |
| Description | IC 19-BIT BUS INTERFACE 48-TSSOP |
| Manufacturer | Texas Instruments |
| Series | 74LVCZ |
| SN74LVCZ161284AGR datasheets |
|
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Specifications of SN74LVCZ161284AGR | |||
|---|---|---|---|
| Logic Type | IEEE STD 1284 Translation Transceiver | Supply Voltage | 3 V ~ 3.6 V |
| Number Of Bits | 19 | Operating Temperature | 0°C ~ 70°C |
| Mounting Type | Surface Mount | Package / Case | 48-TSSOP |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | Other names | 296-12025-2 |
PrevNext
SN74LVCZ161284A
19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER
WITH ERROR-FREE POWER UP
SCES358B – SEPTEMBER 2001 – REVISED MAY 2005
(1)
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
V
CABLE
Supply voltage range
CC
V
Supply voltage range
CC
V
I
Input and output voltage range
V
O
I
Input clamp current
IK
I
Output clamp current
OK
I
Continuous output current
O
Continuous current through each V
I
Output high sink current
SK
Package thermal impedance
JA
T
Storage temperature range
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The ac input voltage pulse duration is limited to 40 ns if the amplitude is greater than –0.5 V.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
V
CABLE
Supply voltage for the cable side, V
CC
V
Supply voltage
CC
V
High-level input voltage
IH
V
Low-level input voltage
IL
V
Input voltage
I
V
Open-drain output voltage
O
I
High-level output current
OH
I
Low-level output current
OL
T
Operating free-air temperature
A
(1) All unused inputs of the device must be held at V
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
(2) (3)
Cable side
(2)
Peripheral side
V
< 0
I
V
< 0
O
Except PERI LOGIC OUT
PERI LOGIC OUT
or GND
CC
V
= 5.5 V and V
CABLE = 3 V
O
CC
(4)
(1)
CABLE
V
CC
CC
A, B, DIR, and HD
C14–C17
HOST LOGIC IN
PERI LOGIC IN
A, B, DIR, and HD
C14–C17
HOST LOGIC IN
PERI LOGIC IN
Peripheral side
Cable side
HD low
HD high, B and Y outputs
A outputs and HOST LOGIC OUT
PERI LOGIC OUT
B and Y outputs
A outputs and HOST LOGIC OUT
PERI LOGIC OUT
or GND to ensure proper device operation. Refer to the TI application report,
CC
www.ti.com
MIN
MAX
UNIT
–0.5
7
V
–0.5
4.6
V
–2
7
V
–0.5
V
+ 0.5
CC
–20
mA
–50
mA
±50
mA
±100
±200
mA
65
mA
70
°C/W
–65
150
°C
MIN
MAX
UNIT
3
5.5
V
3
3.6
V
2
2.3
V
2.6
2
0.8
0.8
V
1.6
0.8
0
V
CC
V
0
5.5
0
5.5
V
–14
–4
mA
–0.5
14
4
mA
84
0
70
°C
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