74LVX161284MTDX Fairchild Semiconductor, 74LVX161284MTDX Datasheet
74LVX161284MTDX
Specifications of 74LVX161284MTDX
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74LVX161284MTDX Summary of contents
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... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram © 2005 Fairchild Semiconductor Corporation Features Supports IEEE 1284 Level 1 and Level 2 signaling ...
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Logic Symbol Truth Table Inputs DIR Note 1: Y –Y Open Drain Outputs 9 13 Note 2: B –B Open Drain Outputs 1 8 Logic Diagram www.fairchildsemi.com Outputs –B Data to A –A ...
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Absolute Maximum Ratings Supply Voltage CC—Cable t V Must Be V CC—Cable CC Input Voltage (V )—(Note –A , PLH , DIR –B , ...
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DC Electrical Characteristics Symbol Parameter V Maximum LOW A , HLH OL n Level Output Voltage PLH PLH R Maximum Output B – – ...
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AC Electrical Characteristics Symbol Parameter V Min t A – –B 2.0 PHL – –B 2.0 PLH – –A 2.0 PHL 1 ...
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AC Loading and Waveforms d Pulse Generator for all pulses: Rate 1.0 MHz; Z FIGURE 1. Port and Propagation Delay Waveforms FIGURE 2. Port and Output Waveforms FIGURE ...
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AC Loading and Waveforms FIGURE 4. Port and Slew Test Load and Waveforms FIGURE 5. Port and Slew Test Load and Waveforms (Continued) 7 www.fairchildsemi.com ...
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AC Loading and Waveforms t Output Rise Time, Open Drain r t Output Fall Time, Open Drain f FIGURE 6. Ports and Rise and Fall Test Load and Waveforms for Open Drain Outputs FIGURE ...
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AC Loading and Waveforms FIGURE 8. t and t PZH FIGURE 9. t (Continued) Test Load and Waveforms, DIR to A PZL and t Test Load and Waveforms PHZ PLZ DIR to B – – ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide www.fairchildsemi.com Package Number MS48A 10 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...