598AAA000107DG Silicon Labs, 598AAA000107DG Datasheet - Page 8

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598AAA000107DG

Manufacturer Part Number
598AAA000107DG
Description
Programmable Oscillators PRGRMMBL XO 8 PIN 0.5PS RS JTR
Manufacturer
Silicon Labs
Datasheet

Specifications of 598AAA000107DG

Product Category
Programmable Oscillators
Rohs
yes
Package / Case
7 mm x 5 mm
Frequency Stability
50 PPM
Supply Voltage
3.3 V
Termination Style
SMD/SMT
Output Format
LVPECL
Minimum Operating Temperature
- 40 C
Maximum Operating Temperature
+ 85 C
Dimensions
5 mm W x 7 mm L x 1.65 mm H
Mounting Style
SMD/SMT
Product
Programmable
Si598/Si599
Table 6. CLK± Output Phase Jitter (Si599)
(Typical values TA = 25 ºC, V
noted)
8
Table 5. CLK± Output Phase Jitter (Si598)
(Typical values TA = 25 ºC, V
noted)
Phase Jitter (RMS)
for F
810 MHz
Notes:
Phase Jitter (RMS Random)
12 kHz to 20 MHz Integration Bandwidth
Phase Jitter (RMS Random)
1.875 to 20 MHz Integration Bandwidth
Phase Jitter (RMS)
12 kHz to 20 MHz Integration Bandwidth
Phase Jitter (RMS)
1.875 to 20 MHz Integration Bandwidth
Notes:
1. Differential Modes: LVPECL/LVDS/CML.
2. For best jitter and phase noise performance, always choose the smallest K
1. 50 to 810 MHz, 3.3 V/2.5 V only.
2. 50 to 160 MHz, single-ended CMOS output phase jitter measured using 33  series termination into 50  phase noise
OUT
requirements. See “AN266: VCXO Tuning Slope (K
test equipment. 3.3 V supply voltage option only.
of 50 MHz < F
Parameter
Parameter
1,2
OUT
DD
DD
= 3.3 V, min/max limits VDD = 1.8 ±5%, 2.5 or 3.3 V ±10%, TA = –40 to 85 ºC unless otherwise
= 3.3 V, min/max limits VDD = 1.8 ±5%, 2.5 or 3.3 V ±10%, TA = –40 to 85 ºC unless otherwise
Symbol
J
φ
Kv = 45 ppm/V
Kv = 95 ppm/V
Kv = 125 ppm/V
Kv = 185 ppm/V
Kv = 380 ppm/V
Symbol
J-RANDOM
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
φ
J
Test Condition
V
Rev. 1.0
), Stability, and Absolute Pull Range (APR)” for more information.
LVPECL/LVDS/CML
LVPECL/LVDS/CML
LVPECL/LVDS/CML
LVPECL/LVDS/CML
Test Condition
CMOS 3.3 V
CMOS 3.3 V
CMOS 3.3 V
CMOS 3.3 V
V
2
2
2
2
that meets the application’s minimum APR
1
1
1
1
Min
Min
Typ
0.5
0.5
0.5
0.5
0.7
Typ
0.5
0.6
0.3
0.5
0.5
0.6
0.5
0.5
Max
Max
1
1
Units
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps

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