598AAA000107DG Silicon Labs, 598AAA000107DG Datasheet - Page 14

• Manufacturer Part Number: 598AAA000107DG
• Description: Programmable Oscillators PRGRMMBL XO 8 PIN 0.5PS RS JTR
• Manufacturer: Silicon Labs

Specifications of 598AAA000107DG

• Product Category: Programmable Oscillators
• Rohs: yes
• Package / Case: 7 mm x 5 mm
• Frequency Stability: 50 PPM
• Supply Voltage: 3.3 V
• Termination Style: SMD/SMT
• Output Format: LVPECL
• Minimum Operating Temperature: - 40 C
• Maximum Operating Temperature: + 85 C
• Dimensions: 5 mm W x 7 mm L x 1.65 mm H
• Mounting Style: SMD/SMT
• Product: Programmable

Si598/Si599
3. Unfreeze the DCO and assert the NewFreq bit (bit 6
The process of freezing and unfreezing the DCO will
cause the output clock to momentarily stop and start at
any arbitrary point during a clock cycle. This process
can take up to 10 ms. Circuitry that is sensitive to
glitches or runt pulses may have to be reset after the
new frequency configuration is written.
Example:
An Si598 generating 156.25 MHz must be re-configured
to generate a 161.1328125 MHz clock (156.25 MHz x
66/64). This frequency change is greater than
±3500 ppm.
f
Read the current values for RFREQ, HS_DIV, N1:
RFREQ
34265439877d / 2
HS_DIV = 4
N1 = 8
Calculate f
Given
dividers that will keep f
14
out
of Register 135) within the maximum Unfreeze to
NewFreq Timeout in Table 12, “Programming
Constraints and Timing,” on page 10.
f
= 156.25 MHz
DCO_current
S Slave Address
S Slave Address
(Optional data byte and acknowledge before the last data byte and not acknowledge illustrated)
A – Acknowledge (SDA LOW)
N – Not Acknowledge (SDA HIGH).
S – START condition
P – STOP condition
current
f
out_new
Required after the last data byte to signal the end of the read comand to the slave.
f
XTAL
XTAL
= 0x7FA611E85 = 34265439877d,
=
From master to slave
, f
f
=
= 161.1328125 MHz,
DCO_current
out
28
-------------------------------------- -
RFREQ

f
= 127.64871074631810d
DCO_current
HSDV
DCO
0
0
current

within the range of 4.85 to
(Optional 2
A
A
N1
Byte Address
Byte Address
=
=
39.17 MHz
5.000000000 GHz
Figure 4. I
choose
nd
data byte and acknowledge illustrated)
Read Command
Write Command
A
A
output
From slave to master
2
C Command Format
S
Rev. 1.0
Data
Slave Address 1
5.67 GHz. In this case, keeping the same output
dividers will still keep f
Calculate the new value of RFREQ given the new DCO
frequency:
3.2. I
The control interface to the Si598 is an I
2-wire bus for bidirectional communication. The bus
consists of a bidirectional serial data line (SDA) and a
serial clock input (SCL). Both lines must be connected
to the positive supply via an external pullup.Fast mode
operation is supported for transfer rates up to 400 kbps
as specified in the I
Figure 4 shows the command format for both read and
write access. Data is always sent MSB. Data length is 1
byte. Read and write commands support 1 or more data
bytes as illustrated. The master must send a Not
Acknowledge and a Stop after the last read data byte to
terminate the read command. The timing specifications
and timing diagram for the I
I
The device I
2
C-Bus Specification standard (fast mode operation).
RFREQ
f
DCO_new
A
=
2
161.1328125 MHz 4
C Interface
Data
new
2
=
C address is specified in the part number.
=
f
out_new
f
---------------------- -
DCO_new
f
A
XTAL
2
A
C-Bus Specification standard.
DCO

P
HSDV

Data
=
within its range limits:

131.637733d
2
8
C bus can be found in the
new
=
A
5.156250000 GHz

N1
Data
new
=
2
0x83A342779
C-compatible
N
P