598AAA000107DG

Manufacturer Part Number598AAA000107DG
DescriptionProgrammable Oscillators PRGRMMBL XO 8 PIN 0.5PS RS JTR
ManufacturerSilicon Labs
598AAA000107DG datasheet
 

Specifications of 598AAA000107DG

Product CategoryProgrammable OscillatorsRohsyes
Package / Case7 mm x 5 mmFrequency Stability50 PPM
Supply Voltage3.3 VTermination StyleSMD/SMT
Output FormatLVPECLMinimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 CDimensions5 mm W x 7 mm L x 1.65 mm H
Mounting StyleSMD/SMTProductProgrammable
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Table 7. CLK± Output Period Jitter
(Typical values TA = 25 ºC, V
= 3.3 V unless otherwise noted)
DD
Parameter
Symbol
J
Period Jitter*
PER
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles.
Table 8. CLK± Output Phase Noise (Typical, Si599)
(Typical values TA = 25 ºC, V
= 3.3 V)
DD
Offset Frequency
74.25 MHz
185 ppm/V
LVPECL
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
10 MHz
20 MHz
Table 9. Power Supply Noise Rejection
(Typical values TA = 25 ºC, V
= 3.3 V)
DD
Parameter
RMS Additive Jitter due to Power Supply Noise*
*Note: Measured with 100 mVp-p sinusoid applied to power supply pin. VDD = 3.3 V, LVPECL.
Table 10. Spurious Performance
(Typical values TA = 25 ºC, V
= 3.3 V)
DD
Parameter
Spurious Free Dynamic Range
Notes:
1. 10 to 160 MHz.
2. 10 to 810 MHz.
Test Condition
RMS
Peak-to-Peak
148.5 MHz
185 ppm/V
LVPECL
–77
–68
–101
–95
–121
–116
–134
–128
–149
–144
–151
–147
–150
–148
Symbol
Test Condition
100 kHz
300 kHz
φ
PSRR
700 kHz
1 MHz
Symbol
Test Condition
LVPECL, LVDS, CML
SFDR
LVPECL, LVDS, CML
1
CMOS
Rev. 1.0
Si598/Si599
Min
Typ
Max
Units
3
ps
35
ps
155.52 MHz
Units
95 ppm/V
LVPECL
–77
dBc/Hz
–101
dBc/Hz
–119
dBc/Hz
–127
dBc/Hz
–144
dBc/Hz
–147
dBc/Hz
–148
dBc/Hz
Min
Typ
Max
Units
0.32
ps
0.36
ps
0.36
ps
0.32
ps
Min
Typ
Max Units
1
75
dB
2
64
dB
77
dB
9