VCBUP8168CCYG2

Manufacturer Part NumberVCBUP8168CCYG2
DescriptionDigital Signal Processors & Controllers - DSP, DSC DaVinci Digital Media Processor
ManufacturerTexas Instruments
SeriesTMS320DM8168
VCBUP8168CCYG2 datasheet
 


Specifications of VCBUP8168CCYG2

RohsyesCoreTMS320DM816x
Data Bus Width32 bitProgram Memory Size32 KB
Data Ram Size256 KBMaximum Clock Frequency1.35 GHz
Number Of Programmable I/os64Number Of Timers7
Device Million Instructions Per Second9000 MIPsOperating Supply Voltage1.5 V, 1.8 V, 3.3 V
Maximum Operating Temperature+ 95 CPackage / CaseFCBGA-1031
Mounting StyleSMD/SMTInstruction Set ArchitectureFloating Point
Interface TypeSPIMinimum Operating Temperature0 C
On-chip AdcNoProcessor SeriesTMS320DM8168
ProductDSPsProgram Memory TypeCache
Supply Current3.3 VSupply Voltage - Min1.5 V
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2.4.2 System Memory Management Unit (System MMU)
All C674x DSP accesses through the MDMA port are directed through the system memory management
unit (System MMU) module where they are remapped to physical system addresses. This protects the
ARM Cortex-A8 memory regions from accidental corruption by C674x code and allows for direct allocation
of buffers in user space without the need for translation between ARM and DSP applications.
In addition, accesses by the EDMA TC0 may optionally be routed through the System MMU. This allows
EDMA Channel 0 to be used by the DSP to perform transfers using only the known virtual addresses of
the associated buffers. The MMU_CFG register in the Control Module is used to enable and disable use of
the DSP EDMA MMU by the EDMA TC.
For details on the System MMU features and registers, see the System MMU chapter of the
TMS320DM816x DaVinci Digital Media Processors Technical Reference Manual (literature number
SPRUGX8).
2.4.2.1
System MMU Registers
Table 2-3
lists the System MMU registers.
Table 2-3. System MMU Registers Summary
HEX ADDRESS
0x4801 0000h
0x4801 0010h
MMU_SYSCONFIG
0x4801 0014h
MMU_SYSSTATUS
0x4801 0018h
MMU_IRQSTATUS
0x4801 001Ch
MMU_IRQENABLE
0x4801 0040h
MMU_WALKING_ST
0x4801 0044h
0x4801 0048h
0x4801 004Ch
0x4801 0050h
0x4801 0054h
0x4801 0058h
0x4801 005Ch
0x4801 0060h
0x4801 0064h
MMU_FLUSH_ENTRY
0x4801 0068h
0x4801 006Ch
0x4801 0070h
MMU_EMU_FAULT_AD
0x4801 0080h
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links:
ACRONYM
REGISTER NAME
MMU_REVISION
Revision
Configuration
Status
IRQ Status
IRQ Enable
Table Walking Logic
MMU_CNTL
Control
MMU_FAULT_AD
Fault Address
MMU_TTB
Translation Table Base Address
MMU_LOCK
Lock
MMU_LD_TLB
Load
MMU_CAM
CAM
MMU_RAM
RAM
MMU_GFLUSH
Global Flush
Flush Entry
MMU_READ_CAM
Read CAM
MMU_READ_RAM
Read RAM
EMU Fault Address
MMU_FAULT_PC
Fault Program Counter
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TMS320DM8168 TMS320DM8167 TMS320DM8166 TMS320DM8165
TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614D – MARCH 2011 – REVISED JANUARY 2013
Device Overview
17