VCBUP8168CCYG2

Manufacturer Part NumberVCBUP8168CCYG2
DescriptionDigital Signal Processors & Controllers - DSP, DSC DaVinci Digital Media Processor
ManufacturerTexas Instruments
SeriesTMS320DM8168
VCBUP8168CCYG2 datasheet
 


Specifications of VCBUP8168CCYG2

RohsyesCoreTMS320DM816x
Data Bus Width32 bitProgram Memory Size32 KB
Data Ram Size256 KBMaximum Clock Frequency1.35 GHz
Number Of Programmable I/os64Number Of Timers7
Device Million Instructions Per Second9000 MIPsOperating Supply Voltage1.5 V, 1.8 V, 3.3 V
Maximum Operating Temperature+ 95 CPackage / CaseFCBGA-1031
Mounting StyleSMD/SMTInstruction Set ArchitectureFloating Point
Interface TypeSPIMinimum Operating Temperature0 C
On-chip AdcNoProcessor SeriesTMS320DM8168
ProductDSPsProgram Memory TypeCache
Supply Current3.3 VSupply Voltage - Min1.5 V
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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614D – MARCH 2011 – REVISED JANUARY 2013
Table 2-11. CM_DPLL Register Summary (continued)
HEX ADDRESS
0x4818 037C
CM_AUDIOCLK_MCASP0_CLKSEL
0x4818 0380
CM_AUDIOCLK_MCASP1_CLKSEL
0x4818 0384
CM_AUDIOCLK_MCASP2_CLKSEL
0x4818 0388
CM_AUDIOCLK_MCBSP_CLKSEL
0x4818 0390
0x4818 0394
0x4818 0398
0x4818 039C
0x4818 03A0
0x4818 03A4
0x4818 03A8
0x4818 03B0
0x4818 03B4
Table 2-12. CM_ACTIVE Register Summary
HEX ADDRESS
0x4818 0400
CM_GEM_CLKSTCTRL
0x4818 0404
CM_HDDSS_CLKSTCTRL
0x4818 0408
CM_HDMI_CLKSTCTRL
0x4818 0420
CM_ACTIVE_GEM_CLKCTRL
0x4818 0424
CM_ACTIVE_HDDSS_CLKCTRL HDVPSS clock management control
0x4818 0428
CM_ACTIVE_HDMI_CLKCTRL
Table 2-13. CM_DEFAULT Register Summary
HEX ADDRESS
0x4818 0504
CM_DEFAULT_L3_MED_CLKSTCTRL
0x4818 0508
CM_DEFAULT_L3_FAST_CLKSTCTRL
0x4818 0510
CM_DEFAULT_PCI_CLKSTCTRL
0x4818 0514
CM_DEFAULT_L3_SLOW_CLKSTCTRL L3 clock domain power state transition
0x4818 0520
CM_DEFAULT_EMIF_0_CLKCTRL
0x4818 0524
CM_DEFAULT_EMIF_1_CLKCTRL
0x4818 0528
CM_DEFAULT_DMM_CLKCTRL
0x4818 052C
CM_DEFAULT_FW_CLKCTRL
0x4818 0558
CM_DEFAULT_USB_CLKCTRL
0x4818 0560
CM_DEFAULT_SATA_CLKCTRL
0x4818 0578
CM_DEFAULT_PCI_CLKCTRL
Table 2-14. CM_IVAHD0 Register Summary
HEX ADDRESS
0x4818 0600
CM_IVAHD0_CLKSTCTRL
0x4818 0620
CM_IVAHD0_IVAHD_CLKCTRL HDVICP2-0 clock management control
0x4818 0624
CM_IVAHD0_SL2_CLKCTRL
22
Device Overview
Product Folder Links:
ACRONYM
REGISTER NAME
McASP0 audio clock mux select line
McASP1 audio clock mux select line
McASP2 audio clock mux select line
McBSP audio clock mux select line
CM_TIMER1_CLKSEL
Timer1 clock mux select line
CM_TIMER2_CLKSEL
Timer2 clock mux select line
CM_TIMER3_CLKSEL
Timer3 clock mux select line
CM_TIMER4_CLKSEL
Timer4 clock mux select line
CM_TIMER5_CLKSEL
Timer5 clock mux select line
CM_TIMER6_CLKSEL
Timer6 clock mux select line
CM_TIMER7_CLKSEL
Timer7 clock mux select line
CM_SYSCLK23_CLKSEL
SYSCLK23 clock divider value select
CM_SYSCLK24_CLKSEL
SYSCLK24 clock divider value select
ACRONYM
REGISTER NAME
DSP clock domain power state transition
HDVPSS clock domain power state transition
HDMI clock domain power state transition
DSP clock management control
HDMI clock management control
ACRONYM
REGISTER NAME
L3 clock domain power state transition
L3 clock domain power state transition
PCI clock domain power state transition
EMIF0 clock management control
EMIF1 clock management control
DMM clock management control
EMIF FW clock management control
USB clock management control
SATA clock management control
PCI clock management control
ACRONYM
REGISTER NAME
HDVICP2-0 clock domain power state transition
HDVICP2-0 SL2 clock management control
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