VCBUP8168CCYG2

Manufacturer Part NumberVCBUP8168CCYG2
DescriptionDigital Signal Processors & Controllers - DSP, DSC DaVinci Digital Media Processor
ManufacturerTexas Instruments
SeriesTMS320DM8168
VCBUP8168CCYG2 datasheet
 


Specifications of VCBUP8168CCYG2

RohsyesCoreTMS320DM816x
Data Bus Width32 bitProgram Memory Size32 KB
Data Ram Size256 KBMaximum Clock Frequency1.35 GHz
Number Of Programmable I/os64Number Of Timers7
Device Million Instructions Per Second9000 MIPsOperating Supply Voltage1.5 V, 1.8 V, 3.3 V
Maximum Operating Temperature+ 95 CPackage / CaseFCBGA-1031
Mounting StyleSMD/SMTInstruction Set ArchitectureFloating Point
Interface TypeSPIMinimum Operating Temperature0 C
On-chip AdcNoProcessor SeriesTMS320DM8168
ProductDSPsProgram Memory TypeCache
Supply Current3.3 VSupply Voltage - Min1.5 V
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8.6.3 Management Data Input and Output (MDIO)
The Management Data Input and Output (MDIO) module continuously polls all 32 MDIO addresses in
order to enumerate all PHY devices in the system.
The MDIO module implements the 802.3 serial management interface to interrogate and control Ethernet
PHYs using a shared two-wire bus. Host software uses the MDIO module to configure the auto-
negotiation parameters of each PHY attached to the EMAC, retrieve the negotiation results, and configure
required parameters in the EMAC module for correct operation. The module is designed to allow almost
transparent operation of the MDIO interface, with very little maintenance from the core processor. A single
MDIO interface is pinned out to control the PHY configuration and status monitoring. Multiple external
PHYs can be controlled by the MDIO interface.
For more detailed information on the MDIO peripheral, see the EMAC and MDIO chapter in the
TMS320DM816x DaVinci Digital Media Processors Technical Reference Manual (literature number
SPRUGX8).
8.6.3.1
MDIO Peripheral Register Descriptions
HEX ADDRESS
0x4A10 0800
0x4A10 0804
0x4A10 0808
0x4A10 080C
0x4A10 0810
0x4A10 0814
0x4A10 0818
0x4A10 081C
0x4A10 0820
0x4A10 0824
0x4A10 0828
0x4A10 082C
0x4A10 0880
0x4A10 0884
0x4A10 0888
0x4A10 088C
8.6.3.2
MDIO Electrical Data and Timing
Table 8-47. Timing Requirements for MDIO Input
(see
Figure
8-47)
NO.
1
t
Cycle time, MDIO_MCLK
c(MCLK)
t
Pulse duration, MDIO_MCLK high or low
w(MCLK)
4
t
Setup time, MDIO_MDIO data input valid before MDIO_MCLK high
su(MDIO-MCLKH)
5
t
Hold time, MDIO_MDIO data input valid after MDIO_MCLK high
h(MCLKH-MDIO)
Copyright © 2011–2013, Texas Instruments Incorporated
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Table 8-46. MDIO Registers
ACRONYM
REGISTER NAME
VERSION
MDIO Version
CONTROL
MDIO Control
ALIVE
PHY Alive Status
LINK
PHY Link Status
LINKINTRAW
MDIO Link Status Change Interrupt (Unmasked)
LINKINTMASKED
MDIO Link Status Change Interrupt (Masked)
-
Reserved
USERINTRAW
MDIO User Command Complete Interrupt (Unmasked)
USERINTMASKED
MDIO User Command Complete Interrupt (Masked)
USERINTMASKSET
MDIO User Command Complete Interrupt Mask Set
USERINTMASKCLEAR
MDIO User Command Complete Interrupt Mask Clear
-
Reserved
USERACCESS0
MDIO User Access 0
USERPHYSEL0
MDIO User PHY Select 0
USERACCESS1
MDIO User Access 1
USERPHYSEL1
MDIO User PHY Select 1
Submit Documentation Feedback
TMS320DM8168 TMS320DM8167 TMS320DM8166 TMS320DM8165
TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614D – MARCH 2011 – REVISED JANUARY 2013
MIN
MAX
UNIT
400
ns
180
ns
20
ns
0
ns
Peripheral Information and Timings
227