VCBUP8168CCYG2

Manufacturer Part NumberVCBUP8168CCYG2
DescriptionDigital Signal Processors & Controllers - DSP, DSC DaVinci Digital Media Processor
ManufacturerTexas Instruments
SeriesTMS320DM8168
VCBUP8168CCYG2 datasheet
 


Specifications of VCBUP8168CCYG2

RohsyesCoreTMS320DM816x
Data Bus Width32 bitProgram Memory Size32 KB
Data Ram Size256 KBMaximum Clock Frequency1.35 GHz
Number Of Programmable I/os64Number Of Timers7
Device Million Instructions Per Second9000 MIPsOperating Supply Voltage1.5 V, 1.8 V, 3.3 V
Maximum Operating Temperature+ 95 CPackage / CaseFCBGA-1031
Mounting StyleSMD/SMTInstruction Set ArchitectureFloating Point
Interface TypeSPIMinimum Operating Temperature0 C
On-chip AdcNoProcessor SeriesTMS320DM8168
ProductDSPsProgram Memory TypeCache
Supply Current3.3 VSupply Voltage - Min1.5 V
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8.12 Multichannel Audio Serial Port (McASP)
The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for
the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM)
stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface transmission
(DIT).
8.12.1 McASP Device-Specific Information
The device includes three multichannel audio serial port (McASP) interface peripherals (McASP0,
McASP1, and McASP2). The McASP module consists of a transmit and receive section. These sections
can operate completely independently with different data formats, separate master clocks, bit clocks, and
frame syncs or, alternatively, the transmit and receive sections may be synchronized. The McASP module
also includes shift registers that may be configured to operate as either transmit data or receive data. The
transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM) synchronous
serial format or in a digital audio interface (DIT) format where the bit stream is encoded for SPDIF, AES-3,
IEC-60958, CP-430 transmission. The receive section of the McASP peripheral supports the TDM
synchronous serial format.
The McASP module can support one transmit data format (either a TDM format or DIT format) and one
receive format at a time. All transmit shift registers use the same format and all receive shift registers use
the same format; however, the transmit and receive formats need not be the same. Both the transmit and
receive sections of the McASP also support burst mode, which is useful for non-audio data (for example,
passing control information between two devices).
The McASP peripheral has additional capability for flexible clock generation and error detection and
handling, as well as error management.
The device McASP0 module has six serial data pins, while McASP1 and McASP2 are limited to two serial
data pins each.
The McASP FIFO size is 256 bytes and two DMA and two interrupt requests are supported. Buffers are
used transparently to better manage DMA, which can be leveraged to manage data flow more efficiently.
For more detailed information on and the functionality of the McASP peripheral, see the McASP chapter in
the TMS320DM816x DaVinci Digital Media Processors Technical Reference Manual (literature number
SPRUGX8).
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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614D – MARCH 2011 – REVISED JANUARY 2013
Peripheral Information and Timings
273