VCBUP8168CCYG2

Manufacturer Part NumberVCBUP8168CCYG2
DescriptionDigital Signal Processors & Controllers - DSP, DSC DaVinci Digital Media Processor
ManufacturerTexas Instruments
SeriesTMS320DM8168
VCBUP8168CCYG2 datasheet
 


Specifications of VCBUP8168CCYG2

RohsyesCoreTMS320DM816x
Data Bus Width32 bitProgram Memory Size32 KB
Data Ram Size256 KBMaximum Clock Frequency1.35 GHz
Number Of Programmable I/os64Number Of Timers7
Device Million Instructions Per Second9000 MIPsOperating Supply Voltage1.5 V, 1.8 V, 3.3 V
Maximum Operating Temperature+ 95 CPackage / CaseFCBGA-1031
Mounting StyleSMD/SMTInstruction Set ArchitectureFloating Point
Interface TypeSPIMinimum Operating Temperature0 C
On-chip AdcNoProcessor SeriesTMS320DM8168
ProductDSPsProgram Memory TypeCache
Supply Current3.3 VSupply Voltage - Min1.5 V
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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614D – MARCH 2011 – REVISED JANUARY 2013
3.2.5 General-Purpose Memory Controller (GPMC) Signals
SIGNAL
TYPE
NAME
NO.
GPMC_CLK/
V1
O
GP1[29]
GPMC_CS[5] /
AG1
O
GPMC_A[12]
GPMC_CS[4] /
AG3
O
GP1[21]
GPMC_CS[3]
AG9
O
GPMC_CS[2]
AH2
O
GPMC_CS[1]
AH1
O
GPMC_CS[0]
AH7
O
GPMC_WE
AG2
O
GPMC_OE_RE
AF2
O
GPMC_BE1
AF1
O
GPMC_BE0_CLE
AE11
O
GPMC_ADV_ALE
AE10
O
GPMC_DIR/
AE7
O
GP1[20]
GPMC_WP
AE9
O
GPMC_WAIT
AE8
I
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2) PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup and pulldown resistors and situations where external pullup and pulldown resistors are required,
see
Section
4.3.1, Pullup and Pulldown Resistors.
(3) Specifies the operating IO supply voltage for each signal.
70
Device Pins
Product Folder Links:
Table 3-6. GPMC Terminal Functions
(1)
(2) (3)
OTHER
MUXED
PULL: IPD / DIS
DRIVE: L / L
GP1
GPMC Clock output
DVDD_3P3
PULL: IPU / IPU
GPMC
DRIVE: H / H
GPMC Chip Select 5
PINCTRL212
DVDD_3P3
PULL: IPU / IPU
GP1
DRIVE: H / H
GPMC Chip Select 4
PINCTRL211
DVDD_3P3
PULL: IPU / IPU
-
DRIVE: H / H
GPMC Chip Select 3
PINCTRL210
DVDD_3P3
PULL: IPU / IPU
-
DRIVE: H / H
GPMC Chip Select 2
PINCTRL209
DVDD_3P3
PULL: IPU / IPU
-
DRIVE: H / H
GPMC Chip Select 1
PINCTRL208
DVDD_3P3
PULL: IPU / IPU
-
DRIVE: H / H
GPMC Chip Select 0
PINCTRL207
DVDD_3P3
PULL: IPU / IPU
-
DRIVE: H / H
GPMC Write Enable output
PINCTRL213
DVDD_3P3
PULL: IPU / DIS
-
DRIVE: H / H
GPMC Output Enable output
PINCTRL214
DVDD_3P3
PULL: IPU / DIS
-
DRIVE: H / H
GPMC Upper Byte Enable output
PINCTRL216
DVDD_3P3
PULL: IPU / DIS
-
GPMC Lower Byte Enable output or Command Latch
DRIVE: H / L
PINCTRL215
Enable output
DVDD_3P3
PULL: IPU / DIS
-
GPMC Address Valid output or Address Latch Enable
DRIVE: H / L
PINCTRL217
output
DVDD_3P3
PULL: IPD / DIS
GP1
DRIVE: L / H
GPMC Direction Control for External Transceivers
PINCTRL218
DVDD_3P3
PULL: IPU / IPD
-
DRIVE: H / L
GPMC Write Protect output
PINCTRL219
DVDD_3P3
PULL: IPD / IPD
-
DRIVE: Z / Z
GPMC Wait input
PINCTRL220
DVDD_3P3
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