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SN74LVC161284DLR
SN74LVC161284DLR | |
|---|---|
| Manufacturer Part Number | SN74LVC161284DLR |
| Description | IC BUS INTERF TRI-STATE 48-SSOP |
| Manufacturer | Texas Instruments |
| Series | 74LVC |
| SN74LVC161284DLR datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
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Specifications of SN74LVC161284DLR | |||
|---|---|---|---|
| Logic Type | Bus Interface | Supply Voltage | 3 V ~ 3.6 V |
| Number Of Bits | 19 | Operating Temperature | 0°C ~ 70°C |
| Mounting Type | Surface Mount | Package / Case | 48-SSOP |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | Other names | 296-8467-2 |
PrevNext
D
1.4-kΩ Pullup Resistors Integrated on All
Open-Drain Outputs Eliminate the Need for
Discrete Resistors
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Designed for the IEEE Std 1284-I (Level 1
Type) and IEEE Std 1284-II (Level 2 Type)
Electrical Specifications
D
Flow-Through Architecture Optimizes PCB
Layout
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin-Shrink
Small-Outline (DGG) Packages
description/ordering information
The SN74LVC161284 is designed for 3-V to 3.6-V
V
operation.
This
device
CC
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
This device has eight bidirectional bits; data can
flow in the A-to-B direction when DIR is high and
in the B-to-A direction when DIR is low. This
device also has five drivers, which drive the cable
side, and four receivers. The SN74LVC161284
has one receiver dedicated to the HOST LOGIC
line and a driver to drive the PERI LOGIC line.
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in
a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive
requirements as specified in the IEEE Std 1284-I (level 1 type) and IEEE Std 1284-II (level 2 type) parallel
peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have
a 1.4-kΩ integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low
state or if the output voltage is above V
The device has two supply voltages. V
and output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Even
when V
CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.
CC
The SN74LVC161284 is characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SCAS583J − NOVEMBER 1996 − REVISED FEBRUARY 2005
V
GND
GND
provides
V
PERI LOGIC IN
HOST LOGIC OUT
CABLE. If V
CABLE is off, PERI LOGIC OUT is set to low.
CC
CC
is designed for 3-V to 3.6-V operation. V
CC
•
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN74LVC161284
19 BIT BUS INTERFACE
DGG OR DL PACKAGE
(TOP VIEW)
HD
DIR
1
48
A9
Y9
2
47
A10
3
46
Y10
A11
Y11
4
45
A12
Y12
5
44
A13
Y13
6
43
V
CABLE
7
42
CC
CC
A1
B1
8
41
A2
B2
9
40
GND
10
39
A3
B3
11
38
A4
B4
12
37
A5
B5
13
36
A6
B6
14
35
15
34
GND
A7
16
33
B7
A8
17
32
B8
18
31
V
CABLE
CC
CC
PERI LOGIC OUT
19
30
A14
C14
20
29
A15
C15
21
28
A16
C16
22
27
A17
C17
23
26
HOST LOGIC IN
24
25
CABLE supplies the inputs
CC
Copyright 2005 Texas Instruments Incorporated
1
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SN74LVC161284DLR Summary of contents |
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