MC14490DWR2G ON Semiconductor, MC14490DWR2G Datasheet

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MC14490DWR2G

Manufacturer Part Number
MC14490DWR2G
Description
IC ELIMINATOR BOUNCE HEX 16-SOIC
Manufacturer
ON Semiconductor
Series
4000r
Datasheet

Specifications of MC14490DWR2G

Logic Type
Contact Bounce Eliminator
Supply Voltage
3 V ~ 18 V
Number Of Bits
6
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Function
Eliminator
Operating Temperature (max)
125C
Operating Temperature (min)
-55
Package Type
SOIC W
Pin Count
16
Mounting
Surface Mount
Mounting Style
SMD/SMT
Number Of Circuits
Hex
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC14490DWR2G
MC14490DWR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC14490DWR2G
Manufacturer:
ON
Quantity:
1 902
Part Number:
MC14490DWR2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC14490
Hex Contact Bounce
Eliminator
mode devices, and is used for the elimination of extraneous level changes
that result when interfacing with mechanical contacts. The digital contact
bounce eliminator circuit takes an input signal from a bouncing contact
and generates a clean digital signal four clock periods after the input has
stabilized. The bounce eliminator circuit will remove bounce on both the
“make” and the “break” of a contact closure. The clock for operation of
the MC14490 is derived from an internal R−C oscillator which requires
only an external capacitor to adjust for the desired operating frequency
(bounce delay). The clock may also be driven from an external clock
source or the oscillator of another MC14490 (see Figure 5).
indeterminate states.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 8
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input Current (DC or Transient) per Pin
Power Dissipation, per Package (Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8−Second Soldering)
The MC14490 is constructed with complementary MOS enhancement
NOTE: Immediately after powerup, the outputs of the MC14490 are in
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
Can Be Used as a Digital Integrator, System Synchronizer, or Delay Line
Diode Protection on All Inputs
Six Debouncers Per Package
Internal Pullups on All Data Inputs
Internal Oscillator (R−C), or External Clock Source
TTL Compatible Data Inputs/Outputs
Single Line Input, Debounces Both “Make” and “Break” Contacts
Does Not Require “Form C” (Single Pole Double Throw) Input Signal
Cascadable for Longer Time Delays
Schmitt Trigger on Clock Input (Pin 7)
Supply Voltage Range = 3.0 V to 18 V
Chip Complexity: 546 FETs or 136.5 Equivalent Gates
These are Pb−Free Devices*
Packages: – 7.0 mW/_C From 65_C To 125_C
SS
SS
Parameter
or V
v (V
DD
in
). Unused outputs must be left open.
or V
(Voltages Referenced to V
out
) v V
DD
.
Symbol
V
in
in
V
T
P
, V
T
T
I
and V
stg
DD
in
A
D
L
out
SS
out
)
−0.5 to +18.0
−55 to +125
−65 to +150
−0.5 to V
should be constrained
Value
+ 0.5
± 10
500
260
DD
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
1
1
1
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W = Work Week
G
http://onsemi.com
DW SUFFIX
CASE 751G
SOEIAJ−16
CASE 648
CASE 966
P SUFFIX
F SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
SOIC−16
PDIP−16
Publication Order Number:
16
16
1
16
1
1
DIAGRAMS
AWLYYWWG
MARKING
AWLYYWWG
MC14490P
MC14490
ALYWG
MC14490/D
14490

Related parts for MC14490DWR2G

MC14490DWR2G Summary of contents

Page 1

... DW SUFFIX AWLYYWWG CASE 751G SOEIAJ−16 MC14490 F SUFFIX ALYWG CASE 966 Assembly Location WL Wafer Lot YY Year WW Work Week G = Pb−Free Package ORDERING INFORMATION and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: MC14490/D ...

Page 2

OSCILLATOR φ 1 OSC 7 AND in TWO-PHASE φ 2 CLOCK GENERATOR OSC 9 out PIN ASSIGNMENT ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Characteristic Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 5

The MC14490 Hex Contact Bounce Eliminator is basically a digital integrator. The circuit can integrate both up and down. This enables the circuit to eliminate bounce on both the leading and trailing edges of the signal, shown in the timing ...

Page 6

DD PULLUP RESISTOR (INTERNAL “FORM A” CONTACT 7 OSC OSCILLATOR in AND C ext TWO-PHASE 9 CLOCK GENERATOR OSC out Figure 4. Typical “Form A” Contact Debounce Circuit The single most important characteristic of the MC14490 ...

Page 7

ASYMMETRICAL TIMING In applications where different leading and trailing edge delays are required (such as a fast attack/slow release timer.) Clocks of different frequencies can be gated into the MC14490 as shown in Figure 6. In order to produce a ...

Page 8

≡ ACTIVE LOW B ≡ ACTIVE LOW OSC OR in OSC out INPUT Figure 10. Multiple Output Signal Timing Diagram OUT OUT ...

Page 9

... ORDERING INFORMATION Device MC14490DWG MC14490DWR2G MC14490FG MC14490FELG MC14490PG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Package SOIC−16 (Pb−Free) SOIC−16 (Pb−Free) SOEIAJ−16 (Pb−Free) SOEIAJ−16 (Pb− ...

Page 10

−T− 0.25 (0.010 16X 0. SEATING e PLANE 14X ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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