LCMXO640C-3FN256I Lattice, LCMXO640C-3FN256I Datasheet - Page 11

• Manufacturer Part Number: LCMXO640C-3FN256I
• Description: CPLD - Complex Programmable Logic Devices Use LCMXO640C-3FTN25
• Manufacturer: Lattice

Specifications of LCMXO640C-3FN256I

• Rohs: yes
• Memory Type: SRAM
• Number Of Macrocells: 320
• Maximum Operating Frequency: 500 MHz
• Delay Time: 4.9 ns
• Number Of Programmable I/os: 159
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Package / Case: FPBGA
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 450
• Supply Current: 17 mA
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 1.71 V

Lattice Semiconductor
Figure 2-8. Primary Clocks for MachXO1200 and MachXO2280 Devices
Four secondary clocks are generated from four 16:1 muxes as shown in Figure 2-9. Four of the secondary clock
sources come from dual function clock pins and 12 come from internal routing.
Figure 2-9. Secondary Clocks for MachXO Devices
Routing
Routing
12
Up to 9
Clock
Pads
Clock
Pads
4
4
Outputs
PLL
Up to 6
2-8
16:1
16:1
16:1
16:1
16:1
16:1
16:1
16:1
Primary Clock 0
Primary Clock 1
Primary Clock 2
Primary Clock 3
Secondary (Control)
Clocks
MachXO Family Data Sheet
Architecture