MAX1304ECM Maxim Integrated, MAX1304ECM Datasheet - Page 14

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MAX1304ECM

Manufacturer Part Number
MAX1304ECM
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1304ECM

Number Of Channels
8
Architecture
SAR
Conversion Rate
1075 KSPs
Resolution
12 bit
Input Type
Single-Ended
Snr
71 dB
Interface Type
Parallel
Operating Supply Voltage
2.7 V to 5.25 V, 4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Package / Case
LQFP-48
Maximum Power Dissipation
1818.2 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
2.5 V

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8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
14
MAX1304
MAX1308
MAX1312
24, 39
25, 38
20
21
22
26
27
28
29
30
31
32
33
34
35
36
37
40
41
42
43
______________________________________________________________________________________
MAX1305
MAX1309
MAX1313
24, 39
25, 38
PIN
20
21
22
26
27
28
29
30
31
32
33
34
35
36
37
40
41
42
43
MAX1306
MAX1310
MAX1314
24, 39
25, 38
20
21
22
26
27
28
29
30
31
32
33
34
35
36
37
40
41
42
43
NAME
DGND
DVDD
EOLC
REF+
COM
REF-
EOC
D10
D11
WR
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
RD
Positive Reference Bypass. Bypass REF+ with a 0.1µF capacitor to AGND. Also
bypass REF+ to REF- with a 2.2µF and a 0.1µF capacitor.
V
Reference Common Bypass. Bypass COM to AGND with a 2.2µF and a 0.1µF
capacitor. V
Negative Reference Bypass. Bypass REF- with a 0.1µF capacitor to AGND.
Also bypass REF- to REF+ with a 2.2µF and a 0.1µF capacitor.
V
Digital Ground. DGND is the power return for DVDD. Connect all DGND
pins together.
Digital Power Input. DVDD powers the digital section of the converter, including
the parallel interface. Apply +2.7V to +5.25V to DVDD. Bypass DVDD to DGND
with a 0.1µF capacitor. Connect all DVDD pins together.
D i g i tal I/O 0 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 1 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 2 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 3 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 4 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 5 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 6 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
D i g i tal I/O 7 of 12- Bi t P ar al l el D ata Bus. H i g h i m p ed ance w hen RD = 1 or CS = 1.
Digital Output 8 of 12-Bit Parallel Data Bus. High impedance when RD = 1 or
CS = 1.
Digital Output 9 of 12-Bit Parallel Data Bus. High impedance when RD = 1 or
CS = 1.
Digital Output 10 of 12-Bit Parallel Data Bus. High impedance when RD = 1 or
CS = 1.
Digital Output 11 of 12-Bit Parallel Data Bus. High impedance when RD = 1 or
CS = 1.
E nd - of- C onver si on Output. EOC goes low to i nd i cate the end of a conver si on. It
r etur ns hi g h on the next r i si ng C LK ed g e or the fal l i ng C ON V S T ed g e.
End-of-Last-Conversion Output. EOLC goes low to indicate the end of the
last conversion. It returns high when CONVST goes low for the next
conversion sequence.
Read Inp ut. P ul l i ng RD l ow i ni ti ates a r ead com m and of the p ar al l el d ata b us.
Write Input. Pulling WR low initiates a write command for configuring the device
with D0–D7.
REF+
REF-
= V
= V
COM
COM
COM
- V
+ V
= 13/25 x AVDD.
REF
REF
/2.
/2.
Pin Description (continued)
FUNCTION

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