W7100A WIZnet, W7100A Datasheet - Page 118

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
}

reception of FIN packet as below.
First method :
{
}
Second method :
{
}
Check if the Disconnect-request(FIN packet) has been received. User can confirm the
dst_mask= Sn_TX_WR & gSn_TX_MASK;
/* calculate start address(physical address) */
dst_ptr = gSn_TX_BASE + dst_mask;
/* if overflow SOCKET TX memory */
if ( (dst_mask + len) > (gSn_TX_MASK + 1) )
{
}
else
{/* copy len bytes of source_addr to dst_ptr */
}
/* increase Sn_TX_WR as length of len */
Sn_TX_WR += send_size;
/* set SEND command */
Sn_CR = SEND;
if (Sn_IR(DISCON) == ‘1’) Sn_IR(DISCON)=‘1’; goto CLOSED stage;
/* In this case, if the interrupt of SOCKET n is activated, interrupt occurs. Refer to IR, IMR
if (Sn_SR == SOCK_CLOSE_WAIT) goto CLOSED stage;
ESTABLISHMENT : Check disconnect-request(FIN packet)
Sn_IMR and Sn_IR. */
/* copy upper_size bytes of source_addr to dst_ptr */
upper_size = (gSn_TX_MASK + 1) – dst_mask;
wizmemcpy((0x000000 + source_addr), (0xFE0000 + dst_ptr), upper_size);
/* update source_addr*/
source_addr += upper_size;
/* copy left_size bytes of source_addr to gSn_TX_BASE */
left_size = len – upper_size;
wizmemcpy((0x000000 + source_addr), (0xFE0000 + gSn_TX_BASE), left_size);
wizmemcpy((0x000000 + source_addr), (0xFE0000 + dst_ptr), len);
// dst_ptr is physical start address
// dst_mask is offset address
Ver. 1.12
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