W7100A WIZnet, W7100A Datasheet - Page 131

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W7100A

Manufacturer Part Number
W7100A
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
255 B
Data Ram Size
64 KB
On-chip Adc
No
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 80 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Interface Type
UART
Program Memory Type
Flash

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and execute ‘OPEN’ command. If the Sn_SR is changed to SOCK_IPRAW after the ‘OPEN’
command, the SOCKET initialization is completed.
{
START:
}
IPRAW data is as below.
Select the SOCKET and set the protocol number. Then set the Sn_MR(P3:P0) to IPRAW mode
Refer to the section 9.2.2.1 ‘Unicast & Broadcast’.
Process the IPRAW data which is received in internal RX memory. The structure of received
/* wait until Sn_SR is changed to SOCK_IPRAW */
/* sets Protocol number, the protocol number is used in Protocol Field of IP Header. */
Sn_PROTO = protocol_num;
/* sets IP raw mode */
Sn_MR = 0x03;
/* sets OPEN command */
Sn_CR = OPEN;
if (Sn_SR != SOCK_IPRAW) Sn_CR = CLOSE; goto START;
SOCKET Initialization
Receiving process
Check received data
Figure 9.7 IPRAW Operation Flow
Ver. 1.12
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