W7100A WIZnet, W7100A Datasheet - Page 14

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
1.3.2 TCPIPCore
auto-negotiation and auto-MDI/MDIX. It also supports 6 network indicator LED outputs such as
Link, TX, RX status, Collision, speed and duplex.
WIZnet.
Ethernet PHY
The W7100A includes 10BaseT/100BaseTX Ethernet PHY. It supports half-duplex/full-duplex,
TCPIP Engine
TCPIP Engine is a hardwired logic based network protocol which contains technology of
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This controls Ethernet access of CSMA/CD(Carrier Sense Multiple Access with Collision
Detect). The protocol is based on a 48-bit source/destination MAC address.
This protocol uses PPP service over Ethernet. The payload (PPP frame) is encapsulated
inside an Ethernet frame during a transmission. When receiving, it de-capsulates the
PPP frame. PPPoE supports PPP communication with PPPoE server and PAP/CHAP
authentications.
ARP is the MAC address resolution protocol by using IP address. This protocol exchanges
ARP-reply and ARP-request from peers to determine the MAC address of each other
802.3 Ethernet MAC(Media Access Control)
PPPoE(Point-To-Point Protocol over Ethernet)
ARP(Address Resolution Protocol)
Figure 1.6 TCPIPCore Block Diagram
Ver. 1.12
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