W7100A WIZnet, W7100A Datasheet - Page 79

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
0xFE440B
0xFE440C
0xFE440D
0xFE440E
0xFE440F
0xFE4410
0xFE4411
0xFE4412
0xFE4413
0xFE4414
0xFE4415
0xFE4416
0xFE4417
0xFE441D
0xFE441E
0xFE441F
0xFE4420
0xFE4421
0xFE4422
0xFE4423
0xFE4424
0xFE4425
0xFE4426
0xFE4427
0xFE4428
0xFE4429
0xFE442A
0xFE442B
0xFE442C
0xFE442D
0xFE442E
~
S4_RXMEM_SIZE
S4_TXMEM_SIZE
S4_RX_RSR0
S4_RX_RSR1
S4_TX_FSR0
S4_TX_FSR1
S4_TX_WR0
S4_TX_WR1
S4_RX_WR0
S4_RX_WR1
S4_DPORT0
S4_DPORT1
S4_TX_RD0
S4_TX_RD1
S4_RX_RD0
S4_RX_RD1
S4_PROTO
S4_DHAR5
S4_FRAG0
S4_FRAG1
S4_MSSR0
S4_MSSR1
S4_DIPR0
S4_DIPR1
S4_DIPR2
S4_DIPR3
S4_TOS
S4_TTL
S4_IMR
SOCKET 4 Receive Memory Size Register
SOCKET 4 Transmit Memory Size Register
SOCKET 4 Interrupt Mask Register
S4_DIPR (SOCKET 4 Destination IP Address Register)
S4_DPORT (SOCKET 4 Destination Port Register)
S4_MSSR (SOCKET 4 Maximum Segment Size Register)
SOCKET 4 Protocol of IP Header Field Register in IP raw
mode
SOCKET 4 IP Type of Service(TOS) Register
SOCKET 4 IP Time to Live(TTL) Register
Reserved
S4_TX_FSR (SOCKET 4 Transmit Free Memory Size Register)
S4_TX_RD
(SOCKET 4 Transmit Memory Read Pointer Register)
S4_TX_WR
(SOCKET 4 Transmit Memory Write Pointer Register)
S4_RX_RSR (SOCKET 4 Received Data Size Register)
S4_RX_RD
(SOCKET 4 Receive Memory Read Pointer Register)
S4_RX_WR
(SOCKET 4 Receive Memory Write Pointer Register)
SOCKET 4 Fragment Field Value in IP Header Register
Ver. 1.12
79