W7100A WIZnet, W7100A Datasheet - Page 81

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
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~
S5_RX_RSR0
S5_RX_RSR1
S5_TX_WR0
S5_TX_WR1
S5_RX_WR0
S5_RX_WR1
S6_DPORT0
S5_TX_RD0
S5_TX_RD1
S5_RX_RD0
S5_RX_RD1
S5_FRAG0
S5_FRAG1
S6_PORT0
S6_PORT1
S6_DHAR0
S6_DHAR1
S6_DHAR2
S6_DHAR3
S6_DHAR4
S6_DHAR5
S6_DIPR0
S6_DIPR1
S6_DIPR2
S6_DIPR3
S5_IMR
S6_MR
S6_CR
S6_SR
S6_IR
SOCKET 5 Interrupt Mask Register
SOCKET 6 Mode Register
SOCKET 6 Command Register
SOCKET 6 Interrupt Register
SOCKET 6 SOCKET Status Register
S6_DPORT (SOCKET 6 Destination Port Register)
S5_TX_RD
(SOCKET 5 Transmit Memory Read Pointer Register)
S5_TX_WR
(SOCKET 5 Transmit Memory Write Pointer Register)
S5_RX_RSR (SOCKET 5 Received Data Size Register)
S5_RX_RD
(SOCKET 5 Receive Memory Read Pointer Register)
S5_RX_WR
(SOCKET 5 Receive Memory Write Pointer Register)
S5_FRAG
(SOCKET 5 Fragment Field Value in IP Header Register)
Reserved
S6_PORT (SOCKET 6 Source Port Register)
S6_DHAR (SOCKET 6 Destination Hardware Address Register)
S6_DIPR (SOCKET 6 Destination IP Address Register)
Ver. 1.12
81