MAX1274BCTC

Manufacturer Part NumberMAX1274BCTC
DescriptionAnalog to Digital Converters - ADC
ManufacturerMaxim Integrated
MAX1274BCTC datasheet
 


Specifications of MAX1274BCTC

Number Of Channels1ArchitectureSAR
Conversion Rate1800 KSPsResolution12 bit
Input TypeDifferentialSnr70 dB
Interface TypeQSPI, Serial (SPI, Microwire)Operating Supply Voltage4.75 V to 5.25 V
Maximum Operating Temperature+ 70 CPackage / CaseTQFN EP
Maximum Power Dissipation1349 mWMinimum Operating Temperature0 C
Number Of Converters1Voltage Reference5.25 V
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1.8Msps, Single-Supply, Low-Power,
True-Differential, 12-Bit ADCs
TIMING CHARACTERISTICS
(V
= +5V ±5%, V
= V
, V
= 4.096V, f
DD
L
DD
REF
values are at T
= +25°C.)
A
PARAMETER
SYMBOL
SCLK Pulse-Width High
SCLK Pulse-Width Low
SCLK Rise to DOUT Transition
DOUT Remains Valid After SCLK
t
Rise
CNVST Fall to SCLK Fall
t
CNVST Pulse Width
Power-Up Time; Full Power-Down
t
PWR-UP
Restart Time; Partial Power-Down
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset
error have been nulled.
Note 2: No missing codes over temperature.
Note 3: Conversion time is defined as the number of clock cycles (16) multiplied by the clock period.
Note 4: At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz.
Note 5: The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris-
ing edge of SCLK and terminates on the next falling edge of CNVST. The IC idles in acquisition mode between conversions.
Note 6: Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance.
Note 7: Digital supply current is measured with the V
CNVST
t
CL
t
SETUP
t
CH
SCLK
t
DHOLD
t
DOUT
DOUT
Figure 1. Detailed Serial-Interface Timing
4
_______________________________________________________________________________________
= 28.8MHz, 50% duty cycle, T
SCLK
CONDITIONS
t
V
= 1.8V to V
CH
L
DD
t
V
= 1.8V to V
CL
L
DD
C
= 30pF, V
= 4.75V to V
L
L
DD
t
C
= 30pF, V
= 2.7V to V
DOUT
L
L
DD
C
= 30pF, V
= 1.8V to V
L
L
DD
V
= 1.8V to V
DHOLD
L
DD
V
= 1.8V to V
SETUP
L
DD
t
V
= 1.8V to V
CSW
L
DD
t
RCV
level equal to V
, and the V
IH
L
t
CSW
DOUT
6kΩ
a) HIGH-Z TO V
AND V
OH
Figure 2. Load Circuits for Enable/Disable Times
= -40°C to +85°C, unless otherwise noted. Typical
A
MIN
TYP
MAX
15.6
15.6
14
17
24
4
10
20
2
16
level equal to GND.
IL
V
6kΩ
DOUT
C
L
GND
, V
TO V
,
b) HIGH-Z TO V
OH
OL
OH
OL
TO HIGH-Z
AND V
TO HIGH-Z
OL
UNITS
ns
ns
ns
ns
ns
ns
ms
Cycles
L
C
L
GND
, V
TO V
,
OH
OL