MK20DN512VLL10 Freescale Semiconductor, MK20DN512VLL10 Datasheet

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... Freescale Semiconductor Data Sheet: Technical Data K20 Sub-Family Supports the following: MK20DX256VLL10, MK20DN512VLL10 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 105°C • Performance – 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1 ...

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... DSPI switching specifications (full voltage range).................................................................55 6.8.7 I2C switching specifications................................57 6.8.8 UART switching specifications............................57 6.8.9 SDHC specifications...........................................57 6.8.10 I2S/SAI Switching Specifications........................58 6.9 Human-machine interfaces (HMI)......................................65 6.9.1 TSI electrical specifications................................65 7 Dimensions...............................................................................66 7.1 Obtaining package dimensions.........................................66 8 Pinout........................................................................................66 8.1 K20 Signal Multiplexing and Pin Assignments..................66 8.2 K20 Pinouts.......................................................................70 Freescale Semiconductor, Inc. ...

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... Revision History........................................................................71 K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. 3 ...

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... Description • Fully qualified, general market flow • Prequalification • K20 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • Program flash only • Program flash and FlexMemory Table continues on the next page... Values Freescale Semiconductor, Inc. ...

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... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Description • • • ...

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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...

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... Result of exceeding a rating Measured characteristic K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Terminology and guidelines Max. ...

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... Normal operating range Degraded operating range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Operating (power on) Handling range No permanent failure Handling (power off) Fatal range Expected permanent failure ∞ Fatal range Expected permanent failure ∞ Freescale Semiconductor, Inc. ...

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... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Terminology and guidelines Max. ...

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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 10 Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page... Max. Unit Notes 150 °C 1 260 °C 2 Max. Unit Notes 3 — 1 Max. Unit Notes +2000 V 1 +500 V 2 +100 mA Min. Max. Unit –0.3 3.8 V Freescale Semiconductor, Inc. ...

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... Nonswitching electrical specifications K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. General Min. Max. Unit — ...

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... DD -V )/|I |. The positive injection current limiting resistor is AIO_MIN IN IC Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — — 0.35 × 0.3 × — — — +5 — mA +25 — V — greater than V IN AIO_MIN Freescale Semiconductor, Inc ...

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... Internal low power oscillator period — factory LPO trimmed 1. Rising thresholds are falling threshold + hysteresis voltage Table 3. VBAT power operating requirements Symbol Description V Falling VBAT supply POR detect voltage POR_VBAT K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1 ...

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... Vinput = min and Vinput = and VLLSx→RUN recovery times in the following table Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μA 1 0.025 μ μA 50 kΩ kΩ 3 Freescale Semiconductor, Inc. ...

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... I Very-low-power run mode current at 3.0 V — all DD_VLPR peripheral clocks disabled I Very-low-power run mode current at 3.0 V — all DD_VLPR peripheral clocks enabled K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. — DD — — — — — — ...

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... Table continues on the next page... Max. Unit Notes — 1. 435 μA 2000 μA 4000 μA 9 19.9 μA 105 μA 500 μ μA 43 μA 230 μA 5.4 μA 35 μA 128 μA 9 μA 28 μA 95.5 μA 0.22 μA 0.64 μA 3.2 μA Freescale Semiconductor, Inc. ...

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... USB regulator disabled • No GPIOs toggled • Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Typ. Max. Unit — ...

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... MHz (crystal OSC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 18 Frequency Typ. band (MHz) 0.15–50 23 50–150 27 150–500 28 500–1000 14 0.15–1000 MHz 48MHz SYS BUS Unit Notes dBμ dBμV dBμV dBμV — Freescale Semiconductor, Inc. ...

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... System and core clock SYS f Bus clock BUS FB_CLK FlexBus clock f Flash clock FLASH f External reference clock ERCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Table 8. Capacitance attributes Min. Normal run mode — 20 — — — — 1 VLPR mode — — ...

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... Max. Unit 1.5 — Bus clock cycles 100 — — ns 100 — — Bus clock cycles — — — — — — — — Freescale Semiconductor, Inc. Notes Notes ...

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... Four-layer (2s2p) R θJA Single-layer (1s) R θJMA Four-layer (2s2p) R θJMA — R θJB — R θJC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Description 100 LQFP Thermal 47 resistance, junction to ambient (natural convection) Thermal 35 resistance, junction to ambient (natural convection) Thermal 37 resistance, junction to ambient (200 ft./ min ...

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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 22 Description 100 LQFP Thermal 2 characterization parameter, junction to package top outside center (natural convection) Unit Notes °C/W 4 Min. Max. Unit Frequency dependent MHz 2 — — ns — — — — ns Freescale Semiconductor, Inc. ...

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... TRST assert time J14 TRST setup time (negation) to TCLK high Table 14. JTAG full voltage range electricals Symbol Description Operating voltage K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Ts Th Min. ...

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... Figure 5. Test clock input timing Min. Max. Unit MHz 1/J1 — — — ns 12.5 — ns — — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Freescale Semiconductor, Inc. ...

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... Data inputs Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing TCLK TDI/TMS TDO TDO TDO K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing J5 J6 ...

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... Table continues on the next page... Max. Unit Notes — kHz — 39.0625 kHz ± 0 dco ± 0 dco ± dco ± dco 4 — MHz — 5 MHz — — kHz — — kHz Freescale Semiconductor, Inc. ...

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... MHz vco • 100 MHz vco D Lock entry frequency tolerance lock D Lock exit frequency tolerance unl K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. FLL 31.25 20 20.97 640 × f fll_ref 40 41.94 1280 × f fll_ref 60 62.91 1920 × ...

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... Typ. 1.71 — — 500 — 200 — 300 — 950 — 1.2 — 1.5 Table continues on the next page... Max. Unit Notes -6 150 × 1075( pll_ref Max. Unit Notes 3 — nA — μA — μA — μA — mA — mA Freescale Semiconductor, Inc. ...

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... When low power mode is selected The EXTAL and XTAL pins should only be connected to required oscillator components and must not be connected to any other devices. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — ...

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... NOTE Min. 1.71 — Table continues on the next page... Max. Unit Notes 40 kHz 8 MHz 32 MHz 50 MHz — — ms — ms — ms Typ. Max. Unit — 3.6 V 100 — MΩ Freescale Semiconductor, Inc. ...

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... Sector Erase high-voltage time hversscr t Erase Block high-voltage time for 256 KB hversblk256k 1. Maximum time based on expectations at cycling end-of-life. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — 700 and V specifications do not apply. The voltage of the applied ...

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... Min. Typ. Max. — 2.5 6.0 — 1.5 4.0 Freescale Semiconductor, Inc. Notes μs 1 μs 1 μs 1 μ μs 1 μs 2 μs 1 μs μs μs μs Unit mA mA ...

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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. Max. Program Flash 5 50 — ...

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... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 34 EP3 EP2 EP4 EP9 EP8 EP7 EP5 EP6 Figure 9. EzPort Timing Diagram Min. 2.7 — 20 — 0.5 8.5 0.5 Max. Unit Notes 3.6 V FB_CLK MHz — — — — Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1 ...

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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 10. FlexBus read timing diagram K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 36 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...

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... FB_TA FB_TSIZ[1:0] Figure 11. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 AA=0 FB4 ...

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... Table 29 and 1 Max. Unit Notes — 3 +100 +100 DDA DDA V V SSA SSA — 31/ VREFH — VREFH kΩ 3 — 5 kΩ — 18.0 MHz 4 — 12.0 MHz 4 5 — 818.330 Ksps Freescale Semiconductor, Inc. ...

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... ADC electrical characteristics Table 28. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADC calculator tool ...

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... Notes 3 MHz ADACK f ADACK 6.1 MHz 7.3 MHz 9.5 MHz 4 ±6.8 LSB 5 ±2.1 4 -1.1 to +1.9 LSB 5 -0.3 to 0.5 4 -2.7 to +1.9 LSB 5 -0.7 to +0.5 4 -5.4 LSB V = ADIN V DDA -1 — LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — — dB — dB Freescale Semiconductor, Inc. ...

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... Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz. Figure 13. Typical ENOB vs. ADC_CLK for 16-bit differential mode K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...

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... VREF_OU VREF_OU VREF_OU — SSA V — SSA — 128 — 64 — 32 — 100 1.25 — Table continues on the next page... Max. Unit Notes 3 DDA V V DDA 4 — kΩ IN+ to IN- — — — Ω 5 — µs 6 Freescale Semiconductor, Inc. ...

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... I Input DC current DC_PGA Gain = =0.5V CM Gain =64 =0.1V CM K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 18.484 — 37.037 — MHz unless otherwise stated. Typical values are for ADCK PGAD Min. ...

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... V from 1.71 DDA to 3.6V 0.31 %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =100Hz in Freescale Semiconductor, Inc. ...

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... Supply voltage DD I Supply current, High-speed mode (EN=1, PMODE=1) DDHS I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 85 105 53 88 11.6 13.4 8.0 13.6 7.2 9.6 6.3 9 ...

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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 46 Min. 1 — — — — V – 0.5 DD — — — –0.5 –0.3 -0.6V. DD Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA 3 — 0.5 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 15. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 47 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K20 Sub-Family Data Sheet, Rev. 2, 12/2012 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...

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... Calculated by a best fit curve from V 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...

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... Peripheral operating requirements and behaviors Figure 17. Typical INL error vs. digital code K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 50 Freescale Semiconductor, Inc. ...

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... VREF_OUT if the VREF_OUT functionality is being used for either an internal or external L reference. 2. The load capacitance should not exceed +/-25% of the nominal specified C the device. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1.71 3 ...

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... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ µ Notes Notes ...

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... Standby mode V Regulator output voltage — Input supply Reg33out (VREGIN) < 3.6 V, pass-through mode C External output capacitor OUT ESR External output capacitor equivalent series resistance K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 0.5 0 14.25 0.25 Min. Typ. 2.7 — ...

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... Max. Unit — 290 — mA Min. Max. Unit 2.7 3.6 V — 25 MHz — ns BUS (t /2) − / SCK SCK ( − — ns BUS − — ns BUS 2 — — — — ns Freescale Semiconductor, Inc. Notes . Load Notes 1 2 ...

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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 20. DSPI classic SPI timing — slave mode K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...

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... Last data First data DS5 DS6 First data Data Last data Description Table continues on the next page... Max. Unit Notes 3 12.5 MHz — SCK/2) — — 8.5 ns — ns — ns — ns DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz Freescale Semiconductor, Inc. ...

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... Figure 22. DSPI classic SPI timing — slave mode 2 6.8 switching specifications See General switching specifications. 6.8.8 UART switching specifications See General switching specifications. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data Data Min. ...

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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 58 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 23. SDHC timing Min. Max. Unit 0 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — — ns Freescale Semiconductor, Inc. ...

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... I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/ I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 2.7 3 — ns 45% 55% ...

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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 2.7 80 45% 4.5 2 — — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — — ns — ns — Freescale Semiconductor, Inc. ...

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... I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. 1.71 40 45% ...

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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 1.71 80 45% 5.8 2 — — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — 20.6 — ns — ns — Freescale Semiconductor, Inc. ...

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... I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. 1.71 62.5 45% ...

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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 1.71 250 45 — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — — ns — ns — Freescale Semiconductor, Inc. ...

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... MaxSens Maximum sensitivity Res Resolution T Response time @ 20 pF Con20 I Current added in run mode TSI_RUN I Low power mode current adder TSI_LP K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. Typ. 1.71 — — ...

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... MAPBGA 8 Pinout K20 Sub-Family Data Sheet, Rev. 2, 12/2012 )/( NSCN) ref ext ref = 16 μA (REFCHRG = 7), C ref = 32 μA (REFCHRG = 15), C ref www.freescale.com and perform a keyword search for Then use this document number 98ASS23308W 98ASA00344D = 1.0 pF ref = 0.5 pF ref Freescale Semiconductor, Inc. ...

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... VREFH VREFH 24 VREFL VREFL VREFL 25 VSSA VSSA VSSA 26 VREF_OUT/ VREF_OUT/ VREF_OUT/ CMP1_IN5/ CMP1_IN5/ CMP1_IN5/ K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1/ SPI1_SOUT UART1_RX SDHC0_D0 LLWU_P0 PTE2/ SPI1_SCK UART1_CTS_b SDHC0_DCLK LLWU_P1 ...

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... ALT5 ALT6 ALT7 EzPort EWM_OUT_b EWM_IN RTC_CLKOUT USB_CLKIN JTAG_TCLK/ EZP_CLK SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_TX_BCLK JTAG_TRST_b I2S0_TXD0 FTM1_QD_ PHA I2S0_TX_FS FTM1_QD_ PHB I2S0_RX_BCLK I2S0_TXD1 I2S0_RXD0 I2S0_RX_FS I2S0_RXD1 I2S0_MCLK LPTMR0_ALT1 FTM1_QD_ PHA Freescale Semiconductor, Inc. ...

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... CMP0_IN0 LLWU_P10 79 PTC7 CMP0_IN1 CMP0_IN1 80 PTC8 ADC1_SE4b/ ADC1_SE4b/ CMP0_IN2 CMP0_IN2 81 PTC9 ADC1_SE5b/ ADC1_SE5b/ CMP0_IN3 CMP0_IN3 K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB1 I2C0_SDA FTM1_CH1 PTB2 I2C0_SCL UART0_RTS_b PTB3 I2C0_SDA UART0_CTS_ b/ UART0_COL_b PTB9 SPI1_PCS1 UART3_CTS_b ...

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... FTM0_CH6 LLWU_P15 PTD7 CMT_IRO UART0_TX FTM0_CH7 ALT5 ALT6 ALT7 EzPort FB_AD5 FB_RW_b FB_AD27 FB_AD26 FB_AD25 FB_AD24 FB_CS5_b/ FB_TSIZ1/ FB_BE23_16_b FB_CS4_b/ FB_TSIZ0/ FB_BE31_24_b FB_TBST_b/ FB_CS2_b/ FB_BE15_8_b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT_b FB_AD0 FTM0_FLT0 FTM0_FLT1 Freescale Semiconductor, Inc. ...

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... PGA1_DM/ADC1_DM0/ADC0_DM3 21 VDDA 22 VREFH 23 VREFL 24 VSSA 25 Figure 30. K20 100 LQFP Pinout Diagram 9 Revision History The following table provides a revision history for this document. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Revision History 75 VDD 74 VSS PTC3/LLWU_P7 73 PTC2 72 71 PTC1/LLWU_P6 70 PTC0 PTB23 ...

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... Revision History Rev. No. Date Substantial Changes 1 6/2012 Initial public revision 2 12/2012 Replaced TBDs throughout. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 72 Table 52. Revision History Freescale Semiconductor, Inc. ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...