MK22DX128VLH5 Freescale Semiconductor, MK22DX128VLH5 Datasheet - Page 41

• Manufacturer Part Number: MK22DX128VLH5
• Description: ARM Microcontrollers - MCU ARM+128Kb +USB
• Manufacturer: Freescale Semiconductor

Specifications of MK22DX128VLH5

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: MK22DX128
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT

4.5.6.2 FlexTimers (FTM)
4.5.6.3 Programmable Interrupt Timers (PITs)
4.5.6.4 Low Power Timer
Freescale Semiconductor, Inc.
• Up to eight DAC interval triggers
• Up to eight pulse outputs (pulse-out's)
• Selectale FTM source clock
• Programmable prescaler
• 16-bit counter supporting free-running or initial/final value, and counting is up or up-down
• Input capture, output compare, and edge-aligned and center-aligned PWM modes
• Input capture and output compare modes
• Operation of FTM channels as pairs with equal outputs, pairs with complimentary outputs, or independent channels
• Deadtime insertion is available for each complementary pair
• Generation of hardware triggers
• Software control of PWM outputs
• Up to 4 fault inputs for global fault control
• Configurable channel polarity
• Programmable interrupt on input capture, reference compare, overflowed counter, or detected fault condition
• Quadrature decoder with input filters, relative position counting, and interrupt on position count or capture of position
• DMA support for FTM events
• Global time base mode shares single time base across multiple FTM instances
• Up to 4 general purpose interrupt timers
• Up to 4 interrupt timers for triggering ADC conversions
• 32-bit counter resolution
• Clocked by system clock frequency
• DMA support
• Operation as timer or pulse counter
with independent outputs
count on external event
• One trigger output for ADC hardware trigger and up to eight pre-trigger outputs for ADC trigger select per PDB
• Trigger outputs can be enabled or disabled independently.
• One 16-bit delay register per pre-trigger output
• Optional bypass of the delay registers of the pre-trigger outputs
• Operation in One-Shot or Continuous modes
• Optional back-to-back mode operation, which enables the ADC conversions complete to trigger the next PDB
• One programmable delay interrupt
• One sequence error interrupt
• One channel flag and one sequence error flag per pre-trigger
• DMA support
• One interval trigger output per DAC
• One 16-bit delay interval register per DAC trigger output
• Optional bypass the delay interval trigger registers
• Optional external triggers
• Pulse-out's can be enabled or disabled independently.
• Programmable pulse width
channel
channel
K20 Family Product Brief, Rev. 11, 08/2012
Timers
41