MK20DN512ZVMC10R Freescale Semiconductor, MK20DN512ZVMC10R Datasheet
MK20DN512ZVMC10R
Specifications of MK20DN512ZVMC10R
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MK20DN512ZVMC10R Summary of contents
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... Hardware CRC module to support fast cyclic redundancy checks – 128-bit unique identification (ID) number per chip Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2011–2013 Freescale Semiconductor, Inc. Document Number: K20P121M100SF2 Rev. 7, 02/2013 K20P121M100SF2 • Human-machine interface – ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 2 Freescale Semiconductor, Inc. ...
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... Device clock specifications.................................21 5.3.2 General switching specifications.........................21 5.4 Thermal specifications.......................................................22 5.4.1 Thermal operating requirements.........................22 5.4.2 Thermal attributes...............................................23 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Table of Contents 6 Peripheral operating requirements and behaviors....................24 6.1 Core modules....................................................................24 6.1.1 Debug trace timing specifications.......................24 6.1.2 JTAG electricals..................................................24 6.2 System modules................................................................27 6 ...
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... Revision History........................................................................72 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 4 Freescale Semiconductor, Inc. ...
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... Qualification status K## Kinetis family A Key attribute M Flash memory type K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. freescale.com and perform a part number search for the Description • Fully qualified, general market flow • Prequalification • K20 • Cortex-M4 w/ DSP • ...
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... LQ = 144 LQFP ( mm) • 144 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Values Freescale Semiconductor, Inc. ...
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... An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. 3.3.1 Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...
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... Result of exceeding a rating Measured characteristic K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 8 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Max. Unit V Freescale Semiconductor, Inc. ...
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... Typical values are provided as design guidelines and are neither tested nor guaranteed. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Normal operating range Degraded operating range - No permanent failure ...
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... Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...
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... Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components. 3. Determined according to JEDEC Standard JESD78, IC Latch-Up Test. 4.4 Voltage and current operating ratings K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Max. Unit –55 150 ° ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 12 Min. Max. Unit –0.3 3.8 V — 185 mA –0.3 5.5 V –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Freescale Semiconductor, Inc. ...
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... The positive injection current limiting resistor is calculated as R=(V AIO_MIN IN ICAIO larger of these two calculated resistances if the pin is exposed to positive and negative injection currents. 4. Open drain outputs must be pulled to VDD. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 14 supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1.74 1.84 1.94 2.04 — 0.97 900 Min. 0.8 Typ. Max. Unit Notes 1.1 1.5 V 2.56 2.64 V 2.70 2.78 V 2.80 2.88 V 2.90 2.98 V 3.00 3.08 V ±80 — mV 1.60 1.66 V 1.80 1.86 V 1.90 1.96 V 2.00 2.06 V 2.10 2.16 V ±60 — mV 1.00 1.03 V 1000 1100 μs Typ. Max. Unit Notes 1.1 1.5 V Freescale Semiconductor, Inc ...
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... Input leakage current, digital pins IND • V < V < • 3 • 3 • 2 • 1 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. = -9mA V – 0 -3mA V – 0 -2mA V – 0 -0.6mA V – 0 — ...
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... DD SS min and Vinput = Digital input , and VLLSx→RUN recovery times in the following table 1 Typ. Max. Unit Notes μA 4, — 48 kΩ — 55 kΩ — 57 kΩ — 85 kΩ kΩ kΩ Freescale Semiconductor, Inc ...
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... Wait mode reduced frequency current at 3.0 V — DD_WAIT all peripheral clocks disabled I Very-low-power run mode current at 3.0 V — all DD_VLPR peripheral clocks disabled K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. DD — — — — — — ...
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... Table continues on the next page... Max. Unit Notes — — 1.4 mA 7.9 mA 19.2 mA 435 μA 2000 μA 4000 μ μA 68 μA 270 μA 9 8.9 μA 35 μA 148 μA 5.4 μA 12.5 μA 125 μA 7.6 μA 13.5 μA 46 μA 0.39 μA 0.78 μA 2.9 μA Freescale Semiconductor, Inc. ...
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... USB regulator disabled • No GPIOs toggled • Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Typ. Max. Unit — ...
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... Frequency band (MHz) 0.15–50 50–150 150–500 500–1000 0.15–1000 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 144LQFP 144MAPBGA Unit 23 12 dBμ dBμ dBμ dBμ — Freescale Semiconductor, Inc. Notes ...
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... SYS_USB operation f Bus clock BUS FB_CLK FlexBus clock f Flash clock FLASH f LPTMR clock LPTMR K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc MHz 48MHz SYS BUS Table 8. Capacitance attributes Min. Normal run mode — 20 — — — — ...
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... Min. Max. Unit 1.5 — Bus clock cycles 100 — — ns 100 — — Bus clock cycles — — — — — — — — Freescale Semiconductor, Inc. Notes ...
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... Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air). K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Description 121 MAPBGA Thermal 65 resistance, junction ...
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... T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 24 Min. Frequency dependent 2 2 — — Max. Unit MHz — ns — — ns — Freescale Semiconductor, Inc. ...
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... TCLK clock pulse width • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J4 TCLK rise and fall times K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Min. Max. Unit 2.7 3 ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013 Figure 5. Test clock input timing Min. Max. Unit 20 — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...
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... TCLK J13 TRST 6.2 System modules There are no specifications necessary for the device's system modules. 6.3 Clock modules K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8 ...
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... MHz — 5 MHz — — kHz — — kHz — 39.0625 kHz 25 MHz 2, 50 MHz 75 MHz 100 MHz — MHz 4, — MHz — MHz — MHz ps 180 — 150 — — Freescale Semiconductor, Inc ...
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... BLPI) to PLL enabled (PBE, PEE crystal/resonator is being used as the reference, this specification assumes it is already running. 6.3.2 Oscillator electrical specifications This section provides the electrical characteristics of the module. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. PLL 48.0 — ...
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... MΩ — MΩ — MΩ — MΩ — kΩ — kΩ — kΩ — kΩ Freescale Semiconductor, Inc. ...
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... When transitioning from FBE to FEI mode, restrict the frequency of the input clock so that, when it is divided by FRDIV, it remains within the limits of the DCO input clock frequency. 3. Proper PC board layout procedures must be followed to achieve specifications. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...
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... The voltage of the applied BAT Min. Typ. Max. 1.71 — 3.6 — 100 — — — 0.6 — Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz — BAT Freescale Semiconductor, Inc. Unit V MΩ ...
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... Program Once execution time pgmonce t Erase All Blocks execution time ersall t Verify Backdoor Access Key execution time vfykey K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 7.5 — 13 — 416 Min. ...
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... Freescale Semiconductor, Inc. 3 ...
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... Write endurance represents the number of writes to each FlexRAM location at -40°C ≤Tj ≤ 125°C influenced by the cycling endurance of the FlexNVM (same value as data flash) and the allocated EEPROM backup per subsystem. Minimum and typical values assume all byte-writes to FlexRAM. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...
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... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance (the following graph assumes 10,000 nvmcycd cycles) K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 36 EEESPLIT × EEESIZE × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc. ...
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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 1.71 3.6 — f ...
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... FB_TS. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 38 EP3 EP2 EP4 EP9 EP8 EP7 EP5 EP6 Figure 10. EzPort Timing Diagram Min. 2.7 — 20 — 0.5 8.5 0.5 Max. Unit Notes 3.6 V FB_CLK MHz — — — — Freescale Semiconductor, Inc. ...
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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1 ...
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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 40 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...
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... FB_TSIZ[1:0] Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 ...
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... Table 29 and 1 Max. Unit Notes — 3 +100 +100 DDA DDA V V SSA SSA — 31/ VREFH — VREFH kΩ 3 — 5 kΩ — 18.0 MHz 4 — 12.0 MHz 4 5 — 818.330 Ksps Freescale Semiconductor, Inc. ...
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... Table 28. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 37.037 — = 1.0 MHz, unless otherwise stated. Typical values are for ADCK ADC calculator ...
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... Notes 3 MHz ADACK f ADACK 6.1 MHz 7.3 MHz 9.5 MHz 4 ±6.8 LSB 5 ±2.1 4 -1.1 to +1.9 LSB 5 -0.3 to 0.5 4 -2.7 to +1.9 LSB 5 -0.7 to +0.5 4 -5.4 LSB V = ADIN V DDA -1 — LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — — dB — dB Freescale Semiconductor, Inc. ...
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... Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz. Figure 14. Typical ENOB vs. ADC_CLK for 16-bit differential mode K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...
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... VREF_OU VREF_OU VREF_OU — SSA V — SSA — 128 — 64 — 32 — 100 1.25 — Table continues on the next page... Max. Unit Notes 3 DDA V V DDA 4 — kΩ IN+ to IN- — — — Ω 5 — µs 6 Freescale Semiconductor, Inc. ...
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... Input DC current DC_PGA Gain = =0.5V CM Gain =64 =0.1V CM K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 18.484 — 37.037 — MHz unless otherwise stated. Typical values are for ADCK PGAD Min ...
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... OFS 10 µ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =100Hz in — dB 16-bit differential — dB mode, Average=32, f =100Hz in Freescale Semiconductor, Inc. ...
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... Analog comparator hysteresis H • CR0[HYSTCTR • CR0[HYSTCTR • CR0[HYSTCTR • CR0[HYSTCTR Output high CMPOh V Output low CMPOl t Propagation delay, high-speed mode (EN=1, DHS PMODE=1) K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 11.6 13.4 7.2 9.6 12.8 14.5 11.0 14.3 7.9 13.8 7.3 13.1 6.8 12 ...
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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 50 Min — — –0.5 –0.3 -0 1.3 1.6 1.9 2.2 Vin level (V) Typ. Max. Unit 250 600 ns — 40 μs 7 — μA 3 — 0.5 LSB — 0.3 LSB HYSTCTR S etting 2.5 2.8 3.1 Freescale Semiconductor, Inc. ...
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... L I Output load current L 1. The DAC reference can be selected small load capacitance (47 pF) can improve the bandwidth performance of the DAC K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Min ...
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... Notes 150 μA 700 μA 200 μ μ μs 1 100 DACR ±8 LSB 2 ±1 LSB 3 ±1 LSB 4 ±0.8 %FSR 5 ±0.6 %FSR — μV/C 6 — %FSR/C 250 Ω V/μs — — -80 dB kHz — — Freescale Semiconductor, Inc. ...
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... Figure 18. Typical INL error vs. digital code K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 53 ...
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... The load capacitance should not exceed +/-25% of the nominal specified C the device. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 54 Min. Max. Unit 1.71 3.6 V Operating temperature °C range of the device 100 nF value over the operating temperature range of L Freescale Semiconductor, Inc. Notes 1, 2 ...
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... Symbol Description V Voltage reference output with factory trim out 6.7 Timers See General switching specifications. 6.8 Communication interfaces K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. 1.1915 1.195 1.1977 1.1584 — 1.2376 — ...
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... Table continues on the next page... Typ. Max. Unit — 0.7 V — 2 μA 100 150 μA — 24.8 kΩ 0.33 0 Max. Unit Notes 5.5 V 186 μA 30 μA — μA 120 3.6 V 3 8.16 μF 100 mΩ Freescale Semiconductor, Inc. ...
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... DSPI_SIN to DSPI_SCK input setup DS8 DSPI_SCK to DSPI_SIN input hold 1. The delay is programmable in SPIx_CTARn[PSSCK] and SPIx_CTARn[CSSCK]. 2. The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC]. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. Max. Unit — ...
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... First data Data DS14 First data Data DS4 Min. Max. Unit 2.7 3.6 V 12.5 MHz — ns BUS (t /2) − / SCK SCK — — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...
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... Figure 22. DSPI classic SPI timing — master mode Table 43. Slave mode DSPI timing (full voltage range) Num Operating voltage Frequency of operation K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — BUS ...
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... DS9 DS16 DS11 Last data Last data Fast Mode Unit Minimum Maximum 0 400 kHz 0.6 — 1.3 — 0.6 — 0.6 — 0 100 — +0.1C 300 b Freescale Semiconductor, Inc. µs µs µs µs µ ...
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... HD; DAT Figure 24. Timing definition for fast and standard mode devices on the I 6.8.8 UART switching specifications See General switching specifications. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 Table 44 timing (continued) Symbol Standard Mode ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 62 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 25. SDHC timing Min. Max. Unit 0 400 kHz 0 25\50 MHz 0 20\50 MHz 0 400 kHz 7 — — ns — — 8 — — ns Freescale Semiconductor, Inc. ...
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... I2S_BCLK (output I2S_FS (output) I2S_FS (input) S7 I2S_TXD I2S_RXD Figure 26. I K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors master (clocks driven) and slave S master mode timing (limited voltage range ...
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... MCLK period 10 — — ns — — — — ns S16 S14 S16 Min. Max. Unit 1.71 3 SYS 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -4.3 — ns — -4.6 — ns 23.9 — — ns Freescale Semiconductor, Inc. ...
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... The TSI module is functional with capacitance values outside this range. However, optimal performance is not guaranteed. 2. CAPTRM=7, DELVOL=7, and fixed external capacitance of 20 pF. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 S slave mode timing (full voltage range) Min ...
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... REFCHRG = 15, C ref freescale.com and perform a keyword search for the Then use this document number 98ASA00344D ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 ref = 1.0 pF. The ref = 32 μA, REFCHRG = 31 0.5 ref ref ALT5 ALT6 ALT7 EzPort I2C1_SDA Freescale Semiconductor, Inc. ...
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... CMP2_IN2/ CMP2_IN2/ ADC0_SE22 ADC0_SE22 ADC0_SE22 H3 ADC0_SE16/ ADC0_SE16/ ADC0_SE16/ CMP1_IN2/ CMP1_IN2/ CMP1_IN2/ ADC0_SE21 ADC0_SE21 ADC0_SE21 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE1/ SPI1_SOUT UART1_RX SDHC0_D0 LLWU_P0 PTE2/ SPI1_SCK UART1_CTS_b SDHC0_DCLK LLWU_P1 PTE3 SPI1_SIN ...
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... ALT6 ALT7 EzPort EWM_OUT_b EWM_IN RTC_CLKOUT USB_CLKIN JTAG_TCLK/ EZP_CLK SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_BCLK JTAG_TRST FTM2_QD_ TRACE_D0 PHA FTM2_QD_ PHB I2S0_TXD FTM1_QD_ PHA I2S0_TX_FS FTM1_QD_ PHB I2S0_TX_BCLK I2S0_RXD I2S0_RX_FS I2S0_MCLK I2S0_CLKIN Freescale Semiconductor, Inc. ...
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... CMP1_IN1 LLWU_P7 A8 PTC4/ LLWU_P8 D7 PTC5/ LLWU_P9 C7 PTC6/ CMP0_IN0 CMP0_IN0 LLWU_P10 B7 PTC7 CMP0_IN1 CMP0_IN1 K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA19 FTM1_FLT0 FTM_CLKIN1 PTA29 PTB0/ I2C0_SCL FTM1_CH0 LLWU_P5 PTB1 I2C0_SDA FTM1_CH1 PTB2 I2C0_SCL ...
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... FB_RW_b FB_AD27 FB_AD26 FB_AD25 FB_AD24 FB_CS5_b/ FB_TSIZ1/ FB_BE23_16_b FB_CS4_b/ FB_TSIZ0/ FB_BE31_24_b FB_TBST_b/ FB_CS2_b/ FB_BE15_8_b FB_CS3_b/ FB_TA_b FB_BE7_0_b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT_b FB_AD0 FTM0_FLT0 FTM0_FLT1 FB_A16 FB_A17 FB_A18 FB_A19 FB_A20 FB_A21 FB_A22 FB_A23 Freescale Semiconductor, Inc. ...
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... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...
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... PTC3 PTC0 PTB16 NC C PTC2 PTB19 PTB11 NC D PTC1 PTB18 PTB10 PTB8 E PTB17 PTB9 PTB7 F PTB21 PTB20 PTB6 G PTB3 PTB2 PTB1 PTB0 H PTA1 PTA3 PTA17 PTA29 J PTA4 PTA10 PTA16 RESET_b K PTA14 VSS PTA19 L PTA15 VDD PTA18 Freescale Semiconductor, Inc. ...
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... Changed Reference oscillator current source base current spec and added Low-power current adder footer in "TSI electrical specifications" table K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. footnote in "Voltage and Current Operating Requirements" table. IC spec in "Power consumption operating behaviors" table DD_VBAT description and specs in " ...
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... In "I2S switching specifications", added separate specification tables for the full operating voltage range. K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 74 numbers in 'Power consumption operating behaviors' section. DD_RUN . LAT , V , and V L tdrift vdrift , I , and 'V DP_SRC DDstby Reg33out . ints_t . ADIN Freescale Semiconductor, Inc. ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...