MAX13047EETA+T Maxim Integrated Products, MAX13047EETA+T Datasheet - Page 12

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MAX13047EETA+T

Manufacturer Part Number
MAX13047EETA+T
Description
IC TRANSLATOR 2CH BIDIR 10-UTQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX13047EETA+T

Logic Function
Translator, Bidirectional
Number Of Bits
1
Input Type
CMOS
Output Type
CMOS
Data Rate
16Mbps
Number Of Channels
2
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
15ns
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TDFN Exposed Pad
Supply Voltage
1.65 V ~ 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Single- and Dual-Bidirectional
Low-Level Translator
typical application involves interfacing a low-voltage
microprocessor to an external memory, such as the
DS2502. The maximum data rate depends on the
1-Wire device. For the DS2502, the maximum data rate
is 16.3kbps. A 5kΩ pullup resistor is recommended
when interfacing with the DS2502.
The MAX13046E/MAX13047E can be driven in a push-
pull or open-drain configurations. For open-drain con-
figuration, internal 10kΩ resistors pull up I/O V
V
Characteristics table for maximum data rates when
using open-drain drivers.
Figure 2a. Human Body ESD Test Model
Figure 2b. Human Body Current Waveform
12
CC
VOLTAGE
SOURCE
AMPERES
HIGH-
DC
______________________________________________________________________________________
to their respective power supplies. See the Timing
I
P
36.8%
100%
CHARGE-CURRENT-
90%
10%
LIMIT RESISTOR
0
0
Push-Pull vs. Open-Drain Driving
1MΩ
R
100pF
t
C
RL
C s
STORAGE
CAPACITOR
RESISTANCE
CURRENT WAVEFORM
1500Ω
DISCHARGE
TIME
R
D
t
DL
I r
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
L
DEVICE
UNDER
TEST
and I/O
The MAX13046E/MAX13047E require good PCB layout
for proper operation and optimal rise/fall time perfor-
mance. Ensure proper high-frequency PCB layout even
when operating at low data rates.
Capacitive loading on the I/O lines impacts the rise time
(and fall time) of the MAX13046E/MAX13047E when dri-
ving the signal lines. The actual rise time is a function of
the load capacitance, parasitic capacitance, the supply
voltage, and the drive impedance of the MAX13046E/
MAX13047E.
Operating the MAX13046E/MAX13047E at a low data rate
does NOT increase capacitive load driving capability.
Figure 3a. IEC 61000-4-2 ESD Test Model
Figure 3b. IEC 61000-4-2 ESD Generator Current Waveform
VOLTAGE
SOURCE
HIGH-
tr = 0.7ns TO 1ns
DC
Driving High-Capacitive Load
CHARGE-CURRENT-
LIMIT RESISTOR
50MΩ TO 100MΩ
100%
90%
10%
I
R
C
150pF
C s
30ns
STORAGE
CAPACITOR
RESISTANCE
DISCHARGE
330Ω
R
D
60ns
PCB Layout
DEVICE
UNDER
TEST
t

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