MAX13042EETD+T Maxim Integrated Products, MAX13042EETD+T Datasheet - Page 10

IC LEVEL TRANSLATOR 14-TDFN

MAX13042EETD+T

Manufacturer Part Number
MAX13042EETD+T
Description
IC LEVEL TRANSLATOR 14-TDFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX13042EETD+T

Logic Function
Translator, Bidirectional
Number Of Bits
4
Input Type
CMOS
Output Type
CMOS
Data Rate
100Mbps
Number Of Channels
4
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
6.5ns
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TDFN Exposed Pad
Supply Voltage
2.2 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.62V to 3.6V Improved High-Speed LLT
Figure 4. Simplified Functional Diagram for One I/O Line
The MAX13042E–MAX13045E feature an enable (EN)
input that places the devices into a low-power shutdown
mode when driven low. The MAX13042E–MAX13045E
feature an automatic shutdown mode that disables the
part when V
Use standard high-speed layout practices when
laying out a board with the MAX13042E–MAX13045E.
For example, to minimize line coupling, place all other
signal lines not connected to the MAX13042E–
MAX13045E at least 1x the substrate height of the
PCB away from the input and output lines of the
MAX13042E–MAX13045E.
To reduce ripple and the chance of introducing data
errors, bypass V
ic capacitors. Place all capacitors as close to the
power-supply inputs as possible. For full ESD protec-
tion, bypass V
as close to the V
The MAX13042E–MAX13045E bidirectional level trans-
lators can operate as a unidirectional device to trans-
10
I/O V
______________________________________________________________________________________
V
L
NOTE: THE MAX13042E–MAX13045E ARE ENABLED WHEN
L_
ENABLE
V
L
< V
CC
CC
CC
30μA
AND EN = V
is unconnected or less than V
Unidirectional vs. Bidirectional
Applications Information
L
CC
with a 1µF ceramic capacitor located
and V
input as possible.
L
V
V
.
Layout Recommendations
L
L
Power-Supply Decoupling
CC
CIRCUIT
CIRCUIT
BOOST
BOOST
to ground with 0.1µF ceram-
ENABLE
V
V
CC
CC
Level Translator
Shutdown Mode
30μA
ENABLE
L
.
I/O V
V
CC
CC_
late signals without inversion. These devices provide
the smallest solution (UCSP package) for unidirectional
level translation without inversion.
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Due to the architecture of the MAX13042E–MAX13045E,
it is not recommended to use external pullup or pull-
down resistors on the bus. In certain applications, the
use of external pullup or pulldown resistors is desired to
have a known bus state when there is no active driver
on the bus. The MAX13042E–MAX13045E include inter-
nal pullup current sources that set the bus state when
the device is enabled. In shutdown mode, the state of
I/O V
version (see the Ordering Information/Selector Guide).
The MAX13042E–MAX13045E are designed to pass open-
drain as well as CMOS push-pull signals. When used with
open-drain signaling, the rise time will be dominated by the
interaction of the internal pullup current source and the par-
asitic load capacitance. The MAX13042E–MAX13045E
include internal rise-time accelerators to speed up transi-
tions, eliminating any need for external pullup resistors. For
applications such as I
pullup resistor, please consult the MAX3378E and
MAX3396E data sheets.
For the latest application details on UCSP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow temperature
profiles, as well as the latest information on reliability testing
results, go to Maxim’s website at www.maxim-ic.com/ucsp
to find the Application Note: UCSP – A Wafer-Level Chip-
Scale Package.
PROCESS: BiCMOS
CC_
UCSP Applications Information
and I/O V
L_
2
is dependent on the selected part
C or 1-wire that require an external
Use with External Pullup/
Open-Drain Signaling
Chip Information
ESD Test Conditions
Pulldown Resistors

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