LFE3-150EA-6LFN1156I Lattice, LFE3-150EA-6LFN1156I Datasheet

LFE3-150EA-6LFN1156I

Manufacturer Part Number

LFE3-150EA-6LFN1156I

Description

FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -6 SPEED

Manufacturer

Lattice

Datasheet

1.LFE3-35EA-6LFN672C.pdf (4 pages)

Specifications of LFE3-150EA-6LFN1156I

Rohs

yes

Factory Pack Quantity

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

LFE3-150EA-6LFN1156I

Manufacturer:

Lattice Semiconductor Corporation

Quantity:

10 000

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LOW-POWER SERDES, HIGH-SPEED DDR3, HIGH-CALIBER DSP

LatticeECP3 Family

Build Leading Edge Systems with

Proven 3rd Generation FPGAs

LatticeECP3

performance SERDES, full-featured DSP blocks, and support for

state-of-the-art memory interfaces including DDR3. It offers 35%

to 100% more silicon resources in smaller packages compared

to competitors. Low-power LatticeECP3 FPGAs are used in

a wide range of applications, such as wireless and wireline

communication, video processing, security and surveillance,

industrial networking, industrial automation, computing, storage,

medical equipment, and consumer.

LatticeECP3 FPGAs offer up to 150K LUTs of logic capacity

and 7 Mbits of memory for system integration, cascadable high-

performance DSP blocks for signal processing, high-speed memory

interfaces including DDR3 at 800 Mbps, and up to 1 Gbps LVDS

performance for ADC/DAC and SPI4.2 interfaces. LatticeECP3

further enables you to build high-speed systems with proven 3.2

Gbps low-power SERDES qualified for a number of protocols – PCI

Express 1.1, Ethernet (GbE, SGMII & XAUI), SMPTE SDI (3G/HD/

SD), Serial RapidIO 2.1, low-latency CPRI, and JESD204A.

To accelerate design of LatticeECP3 powered systems, Lattice also

offers a number of generic and application-specific development

kits, an expanding portfolio of free readymade reference designs,

and a set of economical IP suites.

FPGA Fabric Features and Capabilities

Low-Power, High-Value FPGA Fabric

• Low-power 65nm process with 4-input look-up table (LUT)

• Logic densities from 17K to 149K LUTs

• Up to 7Mbits of Embedded Block RAM (EBR) and 303Kbits of

High-Speed Embedded SERDES

• Up to 16 channels with data rates from 150Mbps to 3.2Gbps

• Less than 110mW power per channel at 3.2Gbps

• Supports PCI Express, Ethernet (GbE, XAUI, SGMII),

Flexible sysIO

• LVCMOS 33/25/18/15/12, PCI

• SSTL 33/25/18/15 & HSTL15 & HSTL18

• LVDS, Bus-LVDS, RSDS, MLVDS & LVPECL

• 800Mbps DDR3

• Up to 1Gbps LVDS

Wide Range of Package & User I/O Options

• Up to 586 user I/O pins

• Proven low-cost wirebond fpBGA packages

• Density migration across all densities

• Pb-free / RoHS-compliant

sysCLOCK

• 2 DLLs per device, 2 to 10 PLLs per device

fabric

distributed RAM

SMPTE, Serial RapidIO 2.1, CPRI

™

is the best-in-class mid-range FPGA with high-

PLL and DLL

™

Buffers

LatticeECP3 Features and Benefits

Embedded SERDES

Cascadable DSP with ALU

High-Speed I/O

Advanced Configuration Options

3.2Gbps operation with less than 110mW power per

channel

Built-in pre-emphasis and equalization

Supports PCIe, Ethernet (GbE, XAUI, & SGMII), SMPTE,

Serial RapidIO, CPRI and JESD204A

Quad-based architecture with mix and match of different

protocols within a quad

Single-channel granularity for 3G/HD/SD SDI

Support low latency variation CPRI links for multi-hop

RRH applications

Fully cascadable slice for high performance filter and

wide arithmetic functions

Implement rounding and truncation functions with 54-bit

cascadable arithmetic logic unit

Multiply, accumulate, addition and subtraction

Up to 320 18x18 multipliers

Pre-engineered DDR3 memory (800Mbps)

Up to 1Gbps LVDS

ADC/DAC, 7:1 LVDS, XGMII

Configure with SPI boot flash or parallel burst mode flash

Protect your designs with 128-bit AES

Dual-boot provides backup configuration copy

TransFR

™

I/O support updates while system operates

LATTICESEMI.COM

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LFE3-150EA-6LFN1156I Summary of contents

Page 1

... LatticeECP3 FPGAs offer up to 150K LUTs of logic capacity and 7 Mbits of memory for system integration, cascadable high- performance DSP blocks for signal processing, high-speed memory interfaces including DDR3 at 800 Mbps, and Gbps LVDS performance for ADC/DAC and SPI4 ...

Page 2

... LatticeECP3 Architecture Architecture Overview LatticeECP3 FPGAs utilize Lattice’s third generation of cost optimized transceivers and a low-power 65-nm process FPGA architecture. Building on the successful LatticeECP2M family, LatticeECP3 devices deliver high-performance SERDES blocks, cascadable high-performance sysDSP and sysMEM embedded RAM, distributed memory, sysCLOCK ™ ...

Page 3

... The LatticeECP3 Serial Protocol Board provides a platform to evaluate the LatticeECP3 device's multi-protocol serial protocol functionality as well as DDR2 and DDR3 memory interfaces. The LatticeECP3 Video Protocol Board provides a platform to evaluate the LatticeECP3 device's multi-rate 3G/HD/SDI and 7:1 LVDS capabilities. Breakout options for other display interfaces are also available. ...

Page 4

... Copyright © 2012 Lattice Semiconductor Corporation. Lattice Semiconductor, L (stylized) Lattice Semiconductor Corp., and Lattice (design), ispLEVER, ispLeverCORE, Lattice Diamond, LatticeCORE, LatticeECP3, LatticeECP2M, LatticeMico32, sysCLOCK, sysCONFIG, sysDSP, sysIO, sysMEM, and TransFR are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United States and/or other countries. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...

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