W5100 WIZnet, W5100 Datasheet - Page 2

• Manufacturer Part Number: W5100
• Description: Ethernet ICs 3-IN-1 ENET CONTR TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W5100

• Rohs: yes
• Product: Ethernet Controllers
• Data Rate: 10 Mb/s, 100 Mb/s
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V
• Maximum Operating Temperature: + 80 C
• Package / Case: LQFP-80
• Ethernet Connection Type: 10Base-T, 100Base-TX
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Standard Supported: 802.3, 802.3u

© Copyright 2009-2010 WIZnet Co., Inc. All rights reserved.
Document History Information
Version
Ver. 1.0.0
Ver. 1.0.1
Ver. 1.1.1
Ver. 1.1.2
Ver. 1.1.3
Ver. 1.1.4
Ver. 1.1.5
Ver. 1.1.6
Ver. 1.1.7
Ver. 1.2
Ver. 1.2.1
Ver. 1.2.2
Ver. 1.2.3
Date
Dec. 21, 2006
Jan. 10, 2006
Jun. 19, 2007
Sep. 28, 2007
Oct. 18, 2007
Oct. 18, 2007
Nov. 11, 2007
Jan. 30, 2008
Feb. 12, 2009
Feb. 11, 2010
Jun. 10, 2010
Jun. 28, 2010
Feb. 16, 2011
Descriptions
Released with W5100 Launching
LB bit in Mode register is not used .
W5100 is used only in Big-endian ordering.
Modified the OPMODE2-0 signals descriptions (P. 10)
Modified the TEST_MODE3-0 signals description (P.11)
Modified the Clock signals description (P.12)
Modified the LINKLED signal description (P.12)
Modified the explanation of RECV_INT in Sn_IR register (P. 27)
Replaced the reset value of Sn_DHAR register (0x00 to 0xFF, P. 30)
Modifted the explanation of Sn_DIPR, Sn_DPORT register(P. 31)
Replaced the reset value of Sn_MSS register (0xFFFF to 0x0000, P. 31)
Modified the Operating temperature (P. 63)
Changed the typing error “MISO signal” (P. 10)
Modified the SPI Timing diagram and description (P. 66)
Modified the diagram (P. 40)
Modified the Crystal Characteristics value (P. 67)
Modified the SEN signals description (P.10)
Changed the typing error “SCLK” (P. 66)
Changed the typing error “memory test mode” (P. 19)
Changed the description & type of clock signals (P. 12)
Modified DC characteristic value(p. 63)
Add the power supply signal schematic (P. 12)
Add Sn_TX_WR value changing condition
Modify RD/WR timing diagram (P. 65, 66)
Change the value of SOCK_ARP(0x01) state (P.31)
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