PCA9517ATP,147 NXP Semiconductors, PCA9517ATP,147 Datasheet
PCA9517ATP,147
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PCA9517ATP,147 Summary of contents
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PCA9517A Level translating I Rev. 4 — 9 May 2012 1. General description The PCA9517A is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2 5 ...
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... NXP Semiconductors 2. Features and benefits 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device Voltage level translation from 0 5.5 V and from 2 5.5 V Footprint and functional replacement for PCA9515/15A C-bus and SMBus compatible ...
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... NXP Semiconductors 4. Functional diagram Fig 1. 5. Pinning information 5.1 Pinning Fig 2. Fig 4. PCA9517A Product data sheet V CC(A) PCA9517A SDAA SCLA V CC(B) pull-up resistor EN Functional diagram of PCA9517A CC(A) CC(B) SCLA 2 7 SCLB PCA9517AD 3 6 SDAA SDAB GND 002aad466 Pin configuration for SO8 terminal 1 index area ...
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... NXP Semiconductors 5.2 Pin description Table 3. Symbol V CC(A) SCLA SDAA GND EN SDAB SCLB V CC(B) [1] HWSON8 package die supply ground is connected to both GND pin and exposed center pad. GND pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper head conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region ...
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... NXP Semiconductors 6.1 Enable The EN pin is active HIGH with an internal pull- when the repeater is active. This can be used to isolate a badly behaved slave on power-up until after the system power-up reset. It should never change state during C-bus operation because disabling during a bus operation will hang the bus and ...
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... NXP Semiconductors When port A of the PCA9517A is pulled LOW by a driver on the I detects the falling edge when it goes below 0.3V port B to turn on, causing port B to pull down to about 0.5 V. When port B of the PCA9517A falls, first a CMOS hysteresis type input detects the falling edge and causes the internal driver on port A to turn on and pull the port A pin down to ground ...
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... NXP Semiconductors Fig 6. 10 kΩ 10 kΩ SDAA SDA SCLA SCL BUS PCA9517A MASTER EN Fig 7. Typical series application PCA9517A Product data sheet V CC(A) 10 kΩ 10 kΩ SDA SCL BUS MASTER Typical star application kΩ 10 kΩ 10 kΩ SDAB ...
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... NXP Semiconductors Fig 8. SCL SDA Fig 9. SCL SDA Fig 10. Bus B (2 5.5 V) waveform PCA9517A Product data sheet CARD 1 CARD Ω 75 Ω Remark: Figure 9 and Figure 10 reference on Bus A side. Typical application of PCA9517A driving a short cable 9th clock pulse acknowledge Bus A (0 ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage port B CC(B) V supply voltage port A CC(A) V voltage on an input/output pin I/O I input/output current I/O I input current I P total power dissipation tot T storage temperature ...
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... NXP Semiconductors 9. Static characteristics Table 5. Static characteristics 5.5 V; GND = Symbol Parameter Supplies V supply voltage port B CC(B) V supply voltage port A CC(A) I supply current on pin V CC(VCC(A)) I HIGH-level supply current CCH I LOW-level supply current CCL I contention port A supply current CC(A)c Input and output SDAB and SCLB ...
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... NXP Semiconductors Table 5. Static characteristics 5.5 V; GND = Symbol Parameter Enable V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level input current on IL(EN) pin EN I input leakage current LI C input capacitance i [1] LOW-level supply voltage. [2] V specification is for the first LOW level seen by the SDAB/SCLB lines SDAB/SCLB lines ...
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... NXP Semiconductors 10.1 AC waveforms input 1 PHL 80 % output 0 THL Fig 11. Propagation delay and transition times; port B to port A Fig 13. Propagation delay 11. Test information Fig 14. Test circuit for open-drain outputs PCA9517A Product data sheet 3.0 V 1 PLH 1 0 TLH 002aad642 Fig 12. Propagation delay and transition times ...
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... NXP Semiconductors 12. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area Dimensions (1) Unit max 0.80 0.05 0.65 mm nom 0.75 0.02 0.55 0.2 min 0.70 0.00 0.45 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 18. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 9. Acronym BOM CDM CMOS EOL ESD HBM 2 I C-bus I/O RC SMBus PCA9517A Product data sheet ...
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... NXP Semiconductors 15. Revision history Table 10. Revision history Document ID Release date PCA9517A v.4 20120509 • Modifications: Table 1 “PCA9517 and PCA9517A – Table note [1] – Table note [2] • Table 2 “Ordering information” – Added type number PCA9517ADP/DG – Added • Figure 3 “Pin configuration for TSSOP8 PCA9517A v ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... For sales office addresses, please send an email to: PCA9517A Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 6.2 I C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Application design-in information . . . . . . . . . . 5 8 Limiting values Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 11 10 ...