74HC14D-Q100,118 NXP Semiconductors, 74HC14D-Q100,118 Datasheet

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74HC14D-Q100,118

Manufacturer Part Number
74HC14D-Q100,118
Description
Inverters
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC14D-Q100,118

Rohs
yes
Logic Family
74HC
Logic Type
Hex Schmitt Inverter
Propagation Delay Time
190 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Package / Case
SO-14
Input Level
CMOS
Input Type
Schmitt Trigger
Mounting Style
SMD/SMT
Operating Supply Voltage
2 V to 6 V
Output Level
CMOS
Output Type
Schmitt Trigger
1. General description
2. Features and benefits
3. Applications
The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7A.
The 74HC14-Q100; 74HCT14-Q100 provides six inverting buffers with Schmitt-trigger
action. They are capable of transforming slowly changing input signals into sharply
defined, jitter-free output signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
Rev. 4 — 19 April 2013
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Low-power dissipation
ESD protection:
Multiple package options
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
Specified from 40 C to +85 C and from 40 C to +125 C
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Product data sheet

Related parts for 74HC14D-Q100,118

74HC14D-Q100,118 Summary of contents

Page 1

Hex inverting Schmitt trigger Rev. 4 — 19 April 2013 1. General description The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with JEDEC ...

Page 2

... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range 40 C to +125 C 74HC14N-Q100 40 C to +125 C 74HC14D-Q100 74HCT14D-Q100 40 C to +125 C 74HC14PW-Q100 74HCT14PW-Q100 40 C to +125 C 74HC14BQ-Q100 74HCT14BQ-Q100 5. Functional diagram ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning +&4 +&74  $  < < < *1' Fig 4. Pin configuration DIP14, SO14 and TSSOP14 6.2 Pin description Table 2. Pin description Symbol Pin 11 10, 12 GND Functional description [1] Table 3. Function table Input ...

Page 4

... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK I output clamping current OK I output current O I supply current CC I ground current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC14-Q100 V HIGH-level output voltage = 20  20  20  4.0 mA 5.2 mA LOW-level ...

Page 6

... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics GND = pF; for load circuit see L Symbol Parameter Conditions 74HC14-Q100 t propagation delay nA to nY; see transition time see power dissipation per package capacitance 74HCT14-Q100 t propagation delay nA to nY; see ...

Page 7

... NXP Semiconductors 12. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. Input to output propagation delays Table 8. Measurement points Type Input V M 74HC14-Q100 0.5V CC 74HCT14-Q100 1.3 V Test data is given in Table Definitions test circuit: ...

Page 8

... NXP Semiconductors Table 9. Test data Type Input V I 74HC14-Q100 V CC 74HCT14-Q100 3.0 V 13. Transfer characteristics Table 10. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Symbol Parameter Conditions 74HC14-Q100 V positive-going threshold voltage negative-going V = 2.0 V T ...

Page 9

... NXP Semiconductors (μ 0 Fig 10. Typical 74HC transfer characteristics 74HC_HCT14_Q100 Product data sheet 74HC14-Q100; 74HCT14-Q100 mna846 1.2 1.6 2.0 V ( (mA) 0.8 0.6 0.4 0 1.2 2.4 3.6 All information provided in this document is subject to legal disclaimers. Rev. 4 — 19 April 2013 Hex inverting Schmitt trigger 1 ...

Page 10

... NXP Semiconductors 1 (mA) 1.2 0.9 0 Fig 11. Typical 74HCT transfer characteristics 15. Application information The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula add P = additional power dissipation (W); add f = input frequency (MHz); ...

Page 11

... NXP Semiconductors (1) Positive-going edge. (2) Negative-going edge. Fig 12. Average additional supply current as a function of V 0. (1) Positive-going edge. (2) Negative-going edge. Fig 13. Average additional supply current as a function of V 0. 74HC_HCT14_Q100 Product data sheet 74HC14-Q100; 74HCT14-Q100 400 I CC(AV) (μA) 300 200 positive - going ...

Page 12

... NXP Semiconductors For 74HC14-Q100 and 74HCT14-Q100: For K-factor see Figure 15 Fig 14. Relaxation oscillator  .        K-factor for 74HC14-Q100 Fig 15. Typical K-factor for relaxation oscillator 74HC_HCT14_Q100 Product data sheet 74HC14-Q100; 74HCT14-Q100 R C mna035 1 1  ----------------- - f =  DDD  .      ...

Page 13

... NXP Semiconductors 16. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 14

... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 15

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 16

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 17

... NXP Semiconductors 17. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model MIL Military 18. Revision history Table 12. Revision history Document ID Release date 74HC_HCT14_Q100 v.4 20130419 • ...

Page 18

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 19

... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...

Page 20

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Transfer characteristics ...

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