CBT3257APW NXP Semiconductors, CBT3257APW Datasheet

no-image

CBT3257APW

Manufacturer Part Number
CBT3257APW
Description
Encoders, Decoders, Multiplexers & Demultiplexers QUAD 1OF2 MULTIPLXR/ DEMUX
Manufacturer
NXP Semiconductors
Datasheet

Specifications of CBT3257APW

Product Category
Encoders, Decoders, Multiplexers & Demultiplexers
Rohs
yes
Product
Multiplexers
Logic Family
CBT
Number Of Lines (input / Output)
8 / 4
Propagation Delay Time
0.25 ns at 4.5 V to 5.5 V
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-403
Minimum Operating Temperature
- 40 C
Number Of Input Lines
8
Number Of Output Lines
4
Factory Pack Quantity
96
Part # Aliases
CBT3257APW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CBT3257APW
Manufacturer:
NXP
Quantity:
465
Part Number:
CBT3257APW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
CBT3257APW,118
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. General description
2. Features and benefits
The CBT3257A is a quad 1-of-2 high-speed TTL-compatible multiplexer/demultiplexer.
The low ON resistance of the switch allows inputs to be connected to outputs without
adding propagation delay or generating additional ground bounce noise.
Output enable (OE) and select-control (S) inputs select the appropriate nB1 and nB2
outputs for the nA input data.
The CBT3257A is characterized for operation from 40 C to +85 C.
CBT3257A
Quad 1-of-2 multiplexer/demultiplexer
Rev. 5 — 4 April 2013
5  switch connection between two ports
TTL-compatible input levels
Minimal propagation delay through the switch
Latch-up protection exceeds 100 mA per JEDEC standard JESD78 class II level A
ESD protection:
Multiple package options
Specified from 40 C to +85 C
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Product data sheet

Related parts for CBT3257APW

CBT3257APW Summary of contents

Page 1

CBT3257A Quad 1-of-2 multiplexer/demultiplexer Rev. 5 — 4 April 2013 1. General description The CBT3257A is a quad 1-of-2 high-speed TTL-compatible multiplexer/demultiplexer. The low ON resistance of the switch allows inputs to be connected to outputs without adding propagation delay ...

Page 2

... Type number Temperature range 40 C to +85 C CBT3257AD 40 C to +85 C CBT3257ADB 40 C to +85 C CBT3257ADS 40 C to +85 C CBT3257APW 40 C to +85 C CBT3257ABQ [1] Also known as QSOP16. 4. Functional diagram Fig 1. Logic diagram CBT3257A Product data sheet ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning CBT3257A 1B1 1B2 2B1 5 6 2B2 2A 7 GND 8 001aai364 Fig 2. Pin configuration SOT109-1 (SO16) and SOT519-1 (SSOP16) (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad ...

Page 4

... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin S 1 1B1, 2B1, 3B1, 4B1 11, 14 1B2, 2B2, 3B2, 4B2 3, 6, 10, 13 1A, 2A, 3A GND Functional description Table 3. Function selection H = HIGH voltage level LOW voltage level Don’t care. ...

Page 5

... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions All unused control inputs of the device must be held at V Symbol Parameter V supply voltage CC V HIGH-level input voltage IH V LOW-level input voltage IL T ambient temperature amb 9. Static characteristics Table 6. Static characteristics    ...

Page 6

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics    + 4 5.5 V; for test circuit see amb CC Symbol Parameter t propagation delay pd t enable time en t disable time dis [1] This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance) ...

Page 7

... NXP Semiconductors OE, S input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. Enable and disable times Table 8. Measurement points Supply voltage ...

Page 8

... NXP Semiconductors 12. Test information Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 7. Test circuit for measuring switching times Table 9 ...

Page 9

... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 10

... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 9 ...

Page 11

... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.55 mm 1.73 0.25 0.10 1.40 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT519-1 Fig 10 ...

Page 12

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 14

... NXP Semiconductors 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date CBT3257A v.5 20130404 • Modifications: Table 6 “Static CBT3257A v.4 20090319 CBT3257A v.3 20080704 CBT3257A v ...

Page 15

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 16

... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 17

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Package outline ...

Related keywords