MC10EP31D ON Semiconductor, MC10EP31D Datasheet

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MC10EP31D

Manufacturer Part Number
MC10EP31D
Description
Flip Flops 3.3V/5V ECL D-Type
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC10EP31D

Product Category
Flip Flops
Number Of Circuits
1
Logic Family
10
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Output Type
Differential
Propagation Delay Time
0.41 ns
Supply Voltage - Max
- 5.5 V, 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Minimum Operating Temperature
- 40 C
Number Of Input Lines
1
Number Of Output Lines
1
Factory Pack Quantity
98
Supply Voltage - Min
- 3 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10EP31D
Manufacturer:
ON
Quantity:
6 000
Part Number:
MC10EP31D
Manufacturer:
ON
Quantity:
6
Part Number:
MC10EP31DG
Manufacturer:
ON Semiconductor
Quantity:
33
Part Number:
MC10EP31DR2
Manufacturer:
ON
Quantity:
5 160
MC10EP31, MC100EP31
3.3V / 5V ECL D Flip-Flop
with Set and Reset
Description
is pin and functionally equivalent to the EL31 and LVEL31 devices.
With AC performance much faster than the EL31 and LVEL31
devices, the EP31 is ideal for applications requiring the fastest AC
performance available. Both set and reset inputs are asynchronous,
level triggered signals. Data enters the master portion of the flip−flop
when CLK is low and is transferred to the slave, and thus the outputs,
upon a positive transition of the CLK.
Features
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 10
The MC10/100EP31 is a D flip−flop with set and reset. The device
The 100 Series contains temperature compensation.
V
V
340 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range:
NECL Mode Operating Range:
Open Input Default State
Q Output Will Default LOW with Inputs Open or at V
Pb−Free Packages are Available
CC
CC
= 3.0 V to 5.5 V with V
= 0 V with V
EE
= −3.0 V to −5.5 V
EE
= 0 V
EE
1
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5O
3J
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= MC100
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HP31
Publication Order Number:
A
L
Y
W
G
HEP31
1
ALYW
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10EP31/D
8
1
KEP31
ALYW
ALYWG
1
KP31
G
G
4

Related parts for MC10EP31D

MC10EP31D Summary of contents

Page 1

MC10EP31, MC100EP31 3.3V / 5V ECL D Flip-Flop with Set and Reset Description The MC10/100EP31 flip−flop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster ...

Page 2

SET Flip Flop CLK 3 R RESET 4 Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out T Operating Temperature Range A T Storage Temperature ...

Page 4

Table 5. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 10 Output LOW Voltage (Note 10 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 6

Table 11. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency max (Figure Propagation Delay to PLH t Output Differential PHL CLK Set/Reset Recovery RR t Setup Time S ...

Page 7

... Driver Device Q Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10EP31D MC10EP31DG MC10EP31DR2 MC10EP31DR2G MC10EP31DT MC10EP31DTG MC10EP31DTR2 MC10EP31DTR2G MC10EP31MNR4 MC10EP31MNR4G MC100EP31D MC100EP31DG MC100EP31DR2 MC100EP31DR2G MC100EP31DT MC100EP31DTG MC100EP31DTR2 MC100EP31DTR2G ...

Page 8

Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ...

Page 9

... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...

Page 10

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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